component
DS15BR401TSQ
Public Made by Adomby adom
Texas Instruments LVDS ICs, WQFN-32(5x5). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownDS15BR401TSQ
Texas Instruments · LVDS ICs · WQFN-32(5x5)
DS15BR401TSQ from Texas Instruments, in a WQFN-32(5x5). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | N/C | unconnected | No Connect |
| 2 | PEM | input | Pre-emphasis Control Input (affects all channels) |
| 3 | VDD | power_in | Power supply voltage 3.3V, ±10% |
| 4 | VDD | power_in | Power supply voltage 3.3V, ±10% |
| 5 | GND | power_in | Ground reference for LVDS and CMOS circuitry |
| 6 | VDD | power_in | Power supply voltage 3.3V, ±10% |
| 7 | VDD | power_in | Power supply voltage 3.3V, ±10% |
| 8 | PWDN | input | A logic low activates the hardware power down mode (all channels) |
| 9 | IN0+ | input | Channel 0 non-inverting differential LVDS input |
| 10 | IN0− | input | Channel 0 inverting differential LVDS input |
| 11 | IN1+ | input | Channel 1 non-inverting differential LVDS input |
| 12 | IN1− | input | Channel 1 inverting differential LVDS input |
| 13 | IN2+ | input | Channel 2 non-inverting differential LVDS input |
| 14 | IN2− | input | Channel 2 inverting differential LVDS input |
| 15 | IN3+ | input | Channel 3 non-inverting differential LVDS input |
| 16 | IN3− | input | Channel 3 inverting differential LVDS input |
| 17 | N/C | unconnected | No Connect |
| 18 | N/C | unconnected | No Connect |
| 19 | N/C | unconnected | No Connect |
| 20 | VDD | power_in | Power supply voltage 3.3V, ±10% |
| 21 | VDD | power_in | Power supply voltage 3.3V, ±10% |
| 22 | N/C | unconnected | No Connect |
| 23 | N/C | unconnected | No Connect |
| 24 | N/C | unconnected | No Connect |
| 25 | OUT3- | tri_state | Channel 3 inverting differential LVDS output |
| 26 | OUT3+ | tri_state | Channel 3 non-inverting differential LVDS output |
| 27 | OUT2− | tri_state | Channel 2 inverting differential LVDS output |
| 28 | OUT2+ | tri_state | Channel 2 non-inverting differential LVDS output |
| 29 | OUT1− | tri_state | Channel 1 inverting differential LVDS output |
| 30 | OUT1+ | tri_state | Channel 1 non-inverting differential LVDS output |
| 31 | OUT0− | tri_state | Channel 0 inverting differential LVDS output |
| 32 | OUT0+ | tri_state | Channel 0 non-inverting differential LVDS output |
| 33 | DAP | power_in | Exposed metal thermal pad for ground connection, connect to ground plane with minimum 4 vias for optimal AC and thermal performance |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | WQFN-32(5x5) |
| Category | Interface |
| Pins | 33 |
CAD (KiCad official)
- Symbol:
DS15BR401TSQ - Footprint:
Package_DFN_QFN:QFN-32-1EP_5x5mm_P0.5mm_EP3.3x3.3mm - 3D model: WQFN-32(5x5) (KiCad packages3D, STEP)
- 3D model files:
ds15br401tsq-etched.step/ds15br401tsq-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);ds15br401tsq.step/ds15br401tsq.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (24 pp, sha256
d2f51d86ec9c5b5f, retrieved 2026-10-07, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-4-5-20251001(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).