component
DS15BR400TVSX
Public Made by Adomby adom
Texas Instruments LVDS ICs, TQFP-48(7x7). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
| Name | Last updated |
|---|---|
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| viewers | 11d ago |
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| ds15br400tvsx-etched.step | 11d ago |
| ds15br400tvsx-hero.glb | 11d ago |
| ds15br400tvsx-hero.overlay.json | 11d ago |
| ds15br400tvsx.glb | 11d ago |
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| README.md | 11d ago |
DS15BR400TVSX
Texas Instruments · LVDS ICs · TQFP-48(7x7)
DS15BR400TVSX from Texas Instruments, in a TQFP-48(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | N/C | unconnected | No-connect pin, not connected to the device. |
| 2 | PEM | input | Pre-emphasis control input (LVTTL) affecting all channels: PEM = 0 turns pre-emphasis off and PEM = 1 turns it on, giving approximately 6 dB boost at 750 MHz. |
| 3 | VDD | power_in | Power supply, VDD = 3.3V ±10%; recommended supply range 3.0V to 3.6V. |
| 4 | VDD | power_in | Power supply, VDD = 3.3V ±10%; recommended supply range 3.0V to 3.6V. |
| 5 | VDD | power_in | Power supply, VDD = 3.3V ±10%; recommended supply range 3.0V to 3.6V. |
| 6 | N/C | unconnected | No-connect pin, not connected to the device. |
| 7 | VDD | power_in | Power supply, VDD = 3.3V ±10%; recommended supply range 3.0V to 3.6V. |
| 8 | GND | power_in | Ground reference for LVDS and CMOS circuitry. |
| 9 | GND | power_in | Ground reference for LVDS and CMOS circuitry. |
| 10 | VDD | power_in | Power supply, VDD = 3.3V ±10%; recommended supply range 3.0V to 3.6V. |
| 11 | VDD | power_in | Power supply, VDD = 3.3V ±10%; recommended supply range 3.0V to 3.6V. |
| 12 | PWDN | input | Active-low hardware power-down input (LVTTL) for all channels; a logic low powers down all input and output buffers and internal bias circuitry. |
| 13 | IN0+ | input | Channel 0 non-inverting LVDS differential input; the DS15BR400 has an internal 100 Ω termination across the input pair and differential input voltage VID is specified from 100 mV to 2400 mV. |
| 14 | IN0- | input | Channel 0 inverting LVDS differential input; the DS15BR400 has an internal 100 Ω termination across the input pair and differential input voltage VID is specified from 100 mV to 2400 mV. |
| 15 | IN1+ | input | Channel 1 non-inverting LVDS differential input; the DS15BR400 has an internal 100 Ω termination across the input pair and differential input voltage VID is specified from 100 mV to 2400 mV. |
| 16 | IN1- | input | Channel 1 inverting LVDS differential input; the DS15BR400 has an internal 100 Ω termination across the input pair and differential input voltage VID is specified from 100 mV to 2400 mV. |
| 17 | GND | power_in | Ground reference for LVDS and CMOS circuitry. |
| 18 | GND | power_in | Ground reference for LVDS and CMOS circuitry. |
| 19 | IN2+ | input | Channel 2 non-inverting LVDS differential input; the DS15BR400 has an internal 100 Ω termination across the input pair and differential input voltage VID is specified from 100 mV to 2400 mV. |
| 20 | IN2- | input | Channel 2 inverting LVDS differential input; the DS15BR400 has an internal 100 Ω termination across the input pair and differential input voltage VID is specified from 100 mV to 2400 mV. |
| 21 | IN3+ | input | Channel 3 non-inverting LVDS differential input; the DS15BR400 has an internal 100 Ω termination across the input pair and differential input voltage VID is specified from 100 mV to 2400 mV. |
| 22 | IN3- | input | Channel 3 inverting LVDS differential input; the DS15BR400 has an internal 100 Ω termination across the input pair and differential input voltage VID is specified from 100 mV to 2400 mV. |
| 23 | GND | power_in | Ground reference for LVDS and CMOS circuitry. |
| 24 | GND | power_in | Ground reference for LVDS and CMOS circuitry. |
| 25 | N/C | unconnected | No-connect pin, not connected to the device. |
| 26 | N/C | unconnected | No-connect pin, not connected to the device. |
| 27 | N/C | unconnected | No-connect pin, not connected to the device. |
| 28 | VDD | power_in | Power supply, VDD = 3.3V ±10%; recommended supply range 3.0V to 3.6V. |
| 29 | VDD | power_in | Power supply, VDD = 3.3V ±10%; recommended supply range 3.0V to 3.6V. |
| 30 | N/C | unconnected | No-connect pin, not connected to the device. |
| 31 | N/C | unconnected | No-connect pin, not connected to the device. |
| 32 | VDD | power_in | Power supply, VDD = 3.3V ±10%; recommended supply range 3.0V to 3.6V. |
| 33 | VDD | power_in | Power supply, VDD = 3.3V ±10%; recommended supply range 3.0V to 3.6V. |
| 34 | N/C | unconnected | No-connect pin, not connected to the device. |
| 35 | N/C | unconnected | No-connect pin, not connected to the device. |
| 36 | N/C | unconnected | No-connect pin, not connected to the device. |
| 37 | GND | power_in | Ground reference for LVDS and CMOS circuitry. |
| 38 | GND | power_in | Ground reference for LVDS and CMOS circuitry. |
| 39 | OUT3- | output | Channel 3 inverting LVDS differential output, point-to-point use only (not multidrop/BLVDS). |
| 40 | OUT3+ | output | Channel 3 non-inverting LVDS differential output, point-to-point use only (not multidrop/BLVDS). |
| 41 | OUT2- | output | Channel 2 inverting LVDS differential output, point-to-point use only (not multidrop/BLVDS). |
| 42 | OUT2+ | output | Channel 2 non-inverting LVDS differential output, point-to-point use only (not multidrop/BLVDS). |
| 43 | GND | power_in | Ground reference for LVDS and CMOS circuitry. |
| 44 | GND | power_in | Ground reference for LVDS and CMOS circuitry. |
| 45 | OUT1- | output | Channel 1 inverting LVDS differential output, point-to-point use only (not multidrop/BLVDS). |
| 46 | OUT1+ | output | Channel 1 non-inverting LVDS differential output, point-to-point use only (not multidrop/BLVDS). |
| 47 | OUT0- | output | Channel 0 inverting LVDS differential output, point-to-point use only (not multidrop/BLVDS). |
| 48 | OUT0+ | output | Channel 0 non-inverting LVDS differential output, point-to-point use only (not multidrop/BLVDS). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | TQFP-48(7x7) |
| Category | Interface |
| Pins | 48 |
CAD (KiCad official)
- Symbol:
DS15BR400TVSX - Footprint:
Package_QFP:TQFP-48_7x7mm_P0.5mm - 3D model: TQFP-48(7x7) (KiCad packages3D, STEP)
- 3D model files:
ds15br400tvsx-etched.step/ds15br400tvsx-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);ds15br400tvsx.step/ds15br400tvsx.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (24 pp, sha256
d2f51d86ec9c5b5f, retrieved 2026-10-10, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).