component
DS1388Z-33+T&R
Public Made by Adomby adom
Analog Devices Inc Maxim Integrated Real Time Clocks, SO-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownDS1388Z-33+T&R
Analog Devices Inc Maxim Integrated · Real Time Clocks · SO-8
DS1388Z-33+T&R from Analog Devices Inc Maxim Integrated, in a SO-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | X1 | passive | Connection for a standard 32.768kHz quartz crystal (specified load capacitance CL of 6.0pF); X1 is the oscillator input and can optionally be driven by an external 32.768kHz oscillator. |
| 2 | X2 | passive | Output of the internal oscillator for the 32.768kHz crystal, left unconnected when an external oscillator drives pin X1. |
| 3 | VBACKUP | power_in | Secondary power supply input that must be held between 1.3V and 5.5V for proper operation, and must be connected to ground if not used. |
| 4 | GND | power_in | Ground reference for the device. |
| 5 | SDA | bidirectional | I2C serial data input/output, open drain, requiring an external pullup resistor; the datasheet specifies a logic 0 output limit of VOL = 0.15 x VCC at up to 3 mA. |
| 6 | SCL | input | I2C serial clock input used to synchronize data movement on the serial interface. |
| 7 | RST | bidirectional | Active-low open-drain reset output that is driven low when VCC falls below VPF and also accepts a debounced pushbutton reset input; it has an internal 50k nominal pullup to VCC and no external pullup should be connected. |
| 8 | VCC | power_in | DC power pin for the primary power supply (supply range for DS1388Z-33 is 2.97V to 3.63V per the recommended operating conditions). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Analog Devices Inc Maxim Integrated |
| Package | SO-8 |
| Category | Clock/Timing |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply Voltage | VCC | 2.97 | 3.3 | 3.63 | V | DS1388Z-33; Note 3 | 2 |
| Logic 0 | VIL | -0.3 | V | Note 3; max printed as 0.3 x VCC | 2 | ||
| Pullup Voltage (SCL, SDA) | VPU | 5.5 | V | VCC = 0V | 2 | ||
| VBACKUP Voltage | VBACKUP | 1.3 | 3 | 5.5 | V | Note 3 | 2 |
| Power-Fail Voltage | VPF | 2.7 | 2.88 | 2.97 | V | DS1388Z-33; Note 3 | 2 |
| Voltage Range on VCC or VBACKUP Pins Relative to Ground | VCC/VBACKUP | -0.3 | 6 | V | 2 | ||
| Voltage Range on Inputs Relative to Ground | -0.3 | V | max printed as VCC + 0.3V | 2 | |||
| Operating Temperature Range | TA | -40 | 85 | °C | noncondensing | 2 | |
| Storage Temperature Range | -55 | 125 | °C | 2 | |||
| Lead Temperature (soldering, 10s) | 300 | °C | soldering, 10s | 2 | |||
| Soldering Temperature (reflow) | 260 | °C | reflow | 2 | |||
| Input Leakage (SCL) | ILI | -1 | 1 | μA | 2 | ||
| I/O Leakage (SDA) | ILO | -1 | 1 | μA | 2 | ||
| I/O Leakage (RST) | ILORST | -200 | 10 | μA | Note 8 | 2 | |
| SDA Logic 0 Output | IOLDOUT | 3 | mA | VOL = 0.15 x VCC | 2 | ||
| RST Logic 0 Output | IOLSIR | 3 | mA | VCC > 2V; VOL = 0.4V | 3 | ||
| RST Logic 0 Output | IOLSIR | 250 | μA | 1.3V < VCC < 1.8V; VOL = 0.2 x VCC | 3 | ||
| VCC Active Current, EEPROM Write Cycle | ICCEW | 0.7 | mA | DS1388Z-33; Note 9 | 3 | ||
| VCC Active Current, EEPROM Read, I2C Read/Write Access | ICCER | 250 | μA | DS1388Z-33; Note 9 | 3 | ||
| VCC Standby Current | ICCS | 100 | 150 | μA | DS1388Z-33; Note 10 | 3 | |
| VBACKUP Leakage Current | IBACKUPLKG | 15 | 100 | nA | VBACKUP = 3.7V, VCC = VCC(MAX) | 3 | |
| VBACKUP Current, OSC On (EOSC = 0), SDA = SCL = 0V | IBACKUP | 410 | 550 | nA | VCC = 0V, VBACKUP = 3.7V, TA = +25°C; Note 11 | 3 | |
| VBACKUP Current, OSC Off (EOSC = 1), SDA = SCL = 0V (Data Retention) | IBACKUPDR | 10 | 100 | nA | VCC = 0V, VBACKUP = 3.7V, TA = +25°C; Note 11 | 3 | |
| SCL Clock Frequency | fSCL | 100 | 400 | kHz | Fast mode | 4 | |
| SCL Clock Frequency | fSCL | 0 | 100 | kHz | Standard mode | 4 | |
| Bus Free Time Between a STOP and START Condition | tBUF | 1.3 | μs | Fast mode | 4 | ||
| Bus Free Time Between a STOP and START Condition | tBUF | 4.7 | μs | Standard mode | 4 | ||
| Hold Time (Repeated) START Condition | tHD:STA | 0.6 | μs | Fast mode; Note 12 | 4 | ||
| Hold Time (Repeated) START Condition | tHD:STA | 4 | μs | Standard mode; Note 12 | 4 | ||
| LOW Period of SCL Clock | tLOW | 1.3 | μs | Fast mode | 4 | ||
| LOW Period of SCL Clock | tLOW | 4.7 | μs | Standard mode | 4 | ||
| HIGH Period of SCL Clock | tHIGH | 0.6 | μs | Fast mode | 4 | ||
| HIGH Period of SCL Clock | tHIGH | 4 | μs | Standard mode | 4 | ||
| Setup Time for a Repeated START Condition | tSU:STA | 0.6 | μs | Fast mode | 4 | ||
| Setup Time for a Repeated START Condition | tSU:STA | 4.7 | μs | Standard mode | 4 | ||
| Data Hold Time | tHD:DAT | 0 | 0.9 | μs | Fast mode; Notes 13, 14 | 4 | |
| Data Hold Time | tHD:DAT | 0 | μs | Standard mode; Notes 13, 14 | 4 | ||
| Data Setup Time | tSU:DAT | 100 | ns | Fast mode; Note 15 | 4 | ||
| Data Setup Time | tSU:DAT | 250 | ns | Standard mode; Note 15 | 4 | ||
| Rise Time of Both SDA and SCL Signals | tR | 300 | ns | Fast mode; Note 16 | 4 | ||
| Rise Time of Both SDA and SCL Signals | tR | 1000 | ns | Standard mode; Note 16 | 4 | ||
| Fall Time of Both SDA and SCL Signals | tF | 300 | ns | Fast mode; Note 16 | 4 | ||
| Setup Time for STOP Condition | tSU:STO | 0.6 | μs | Fast mode | 4 | ||
| Setup Time for STOP Condition | tSU:STO | 4 | μs | Standard mode | 4 | ||
| Capacitive Load for Each Bus Line | CB | 400 | pF | Note 16 | 4 | ||
| I/O Capacitance (SDA, SCL, RST) | CI/O | 10 | pF | +25°C | 4 | ||
| Pushbutton Debounce | PBDB | 160 | 180 | ms | 4 | ||
| Reset Active Time | tRST | 160 | 180 | ms | 4 | ||
| EEPROM Write Cycle Time | tWEE | 8 | 10 | ms | 4 | ||
| Oscillator Stop Flag (OSF) Delay | tOSF | 20 | ms | Note 17 | 4 | ||
| VCC Detect to Recognize Inputs (VCC Rising) | tRST | 160 | 180 | ms | Note 18 | 5 | |
| VCC Fall Time; VPF(MAX) to VPF(MIN) | tF | 300 | μs | VPF(MAX) to VPF(MIN) | 5 | ||
| VCC Rise Time; VPF(MIN) to VPF(MAX) | tR | 0 | μs | VPF(MIN) to VPF(MAX) | 5 | ||
| Trickle-Charger Current-Limiting Resistor R1 | R1 | 250 | Ω | Notes 4, 5 | 2 | ||
| Trickle-Charger Current-Limiting Resistor R2 | R2 | 2000 | Ω | Note 6 | 2 | ||
| Trickle-Charger Current-Limiting Resistor R3 | R3 | 4000 | Ω | Note 7 | 2 | ||
| Junction-to-Case Thermal Resistance (θJC) | θJC | 40 | °C/W | Note 1 | 2 |
CAD (KiCad official)
- Symbol:
DS1388Z-33+T&R - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SO-8 (KiCad packages3D, STEP)
- 3D model files:
ds1388z-33-t-r-etched.step/ds1388z-33-t-r-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);ds1388z-33-t-r.step/ds1388z-33-t-r.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Analog Devices Inc Maxim Integrated datasheet (19 pp, sha256
2650ce0d603f3f1f, retrieved 2026-10-18, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).