# DS1307ZN-HXY

**HXY MOSFET** · Real Time Clocks · SOP-8

DS1307ZN-HXY from HXY MOSFET, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | X1 | passive | Connection for a standard 32.768 kHz quartz crystal, designed for a crystal with 12.5 pF specified load capacitance. |
| 2 | X2 | passive | Connection for a standard 32.768 kHz quartz crystal, designed for a crystal with 12.5 pF specified load capacitance. |
| 3 | VBAT | power_in | Battery input for any standard 3-volt lithium cell or other energy source, held between 2.0 and 3.5 V for proper operation. |
| 4 | GND | power_in | Ground. |
| 5 | SDA | bidirectional | Serial data input/output for the 2-wire interface; open drain and requires an external pullup resistor. |
| 6 | SCL | input | Serial clock input used to synchronize data movement on the serial interface. |
| 7 | SQW/OUT | output | Square wave/output driver, open drain with an external pullup resistor required; outputs 1 Hz, 4 kHz, 8 kHz or 32 kHz when SQWE is set to 1, and operates with either VCC or VBAT applied. |
| 8 | VCC | power_in | Primary +5 V power supply input, with a recommended operating range of 4.5 V to 5.5 V. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | HXY MOSFET |
| Package | SOP-8 |
| Category | Clock/Timing |
| Pins | 8 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| SCL Clock Frequency | fSCL | 0 |  | 100 | kHz |  | 11 |
| Bus Free Time Between a STOP and START Condition | tBUF | 4.7 |  |  | us |  | 11 |
| Hold Time (Repeated) START Condition | tHD:STA | 4 |  |  | us |  | 11 |
| LOW Period of SCL Clock | tLOW | 4.7 |  |  | us |  | 11 |
| HIGH Period of SCL Clock | tHIGH | 4 |  |  | us |  | 11 |
| Set-up Time for a Repeated START Condition | tSU:STA | 4.7 |  |  | us |  | 11 |
| Data Hold Time | tHD:DAT | 0 |  |  | us |  | 11 |
| Data Set-up Time | tSU:DAT | 250 |  |  | ns |  | 11 |
| Rise Time of Both SDA and SCL Signals | tR |  |  | 1000 | ns |  | 11 |
| Fall Time of Both SDA and SCL Signals | tF |  |  | 300 | ns |  | 11 |
| Set-up Time for STOP Condition | tSU:STO | 4.7 |  |  | us |  | 11 |
| Capacitive Load for each Bus Line | CB |  |  | 400 | pF |  | 11 |
| I/O Capacitance | CI/O |  |  | 10 | pF |  | 11 |
| Active Supply Current | ICCA |  |  | 1 | mA | SCL clocking at max frequency = 100 kHz | 11 |
| Standby Current | ICCS |  |  | 500 | uA | VCC=5.0V; SDA, SCL=5.0V | 11 |
| Battery Current (OSC ON); SQW/OUT OFF | IBAT1 |  | 1 | 2 | uA | OSC ON; SQW/OUT OFF; VCC=0V, VBAT=3V | 11 |
| Battery Current (OSC ON); SQW/OUT ON (32 kHz) | IBAT2 |  | 1.2 | 2 | uA | OSC ON; SQW/OUT ON (32 kHz); VCC=0V, VBAT=3V | 11 |
| Supply Voltage | VCC | 4.5 | 5 | 5.5 | V | 0°C to 70°C or -40°C to +85°C | 11 |
| Logic 1 Input Voltage | VIH | 2.2 |  |  | V | 0°C to 70°C or -40°C to +85°C | 11 |
| Logic 0 Input Voltage | VIL | -0.3 |  | 0.8 | V | 0°C to 70°C or -40°C to +85°C | 11 |
| VBAT Battery Voltage | VBAT | 2 |  | 3.5 | V | 0°C to 70°C or -40°C to +85°C | 11 |
| Input Leakage | ILI |  |  | 1 | uA | 0°C to 70°C or -40°C to +85°C; VCC=4.5V to 5.5V; SCL only | 11 |
| I/O Leakage | ILO |  |  | 1 | uA | 0°C to 70°C or -40°C to +85°C; VCC=4.5V to 5.5V; SDA and SQW/OUT | 11 |
| Logic 0 Output | VOL |  |  | 0.4 | V | 0°C to 70°C or -40°C to +85°C; VCC=4.5V to 5.5V; sink current 5 mA at VCC=4.5V | 11 |
| Voltage on Any Pin Relative to Ground |  | -0.5 |  | 7 | V |  | 10 |
| Operating Temperature |  | 0 |  | 70 | °C |  | 10 |
| Storage Temperature |  | -55 |  | 125 | °C |  | 10 |
| Soldering Temperature |  |  |  | 260 | °C | 10 seconds, DIP | 10 |

## CAD (KiCad official)

- Symbol: `DS1307ZN-HXY`
- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`
- 3D model: SOP-8 (KiCad packages3D, STEP)
- 3D model files: `ds1307zn-hxy-etched.step` / `ds1307zn-hxy-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `ds1307zn-hxy.step` / `ds1307zn-hxy.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [HXY MOSFET datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8590908647025696768) (14 pp, sha256 `68be9600ae728247`, retrieved 2026-10-19, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text+vision), consensus `claude-opus-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/ds1307zn-hxy-datasheet.pdf)