component
DS1307Z+T&R
Public Made by Adomby adom
Analog Devices Inc Maxim Integrated Real Time Clocks, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
Open in new tab ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.
Symbol & Footprint
Schematic Symbol
Open full view ↗Loads when you scroll to it. Unloads after 5 minutes in the background.
PCB Footprint
Open full view ↗Loads when you scroll to it. Unloads after 5 minutes in the background.
Datasheet
Open in new tab ↗Loads when you scroll to it. Unloads after 5 minutes in the background.
README
markdownDS1307Z+T&R
Analog Devices Inc Maxim Integrated · Real Time Clocks · SOIC-8
DS1307Z+T&R from Analog Devices Inc Maxim Integrated, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | X1 | input | Input to the internal 32.768kHz oscillator, designed for a crystal with 12.5pF specified load capacitance, and can optionally be driven by an external 32.768kHz oscillator. |
| 2 | X2 | passive | Output of the internal oscillator for the 32.768kHz crystal, which is left floating when an external oscillator is connected to X1. |
| 3 | VBAT | power_in | Backup supply input for a 3V lithium cell or other energy source, which must be held between 2.0V and 3.5V for proper operation; VBAT must be grounded if no backup supply is used. |
| 4 | GND | power_in | Ground reference; all device voltages are referenced to ground. |
| 5 | SDA | bidirectional | I2C serial data input/output, open-drain, requiring an external pullup whose voltage can be up to 5.5V regardless of VCC. |
| 6 | SCL | input | I2C serial clock input used to synchronize data movement on the serial interface, with a pullup voltage up to 5.5V regardless of VCC. |
| 7 | SQW/OUT | output | Open-drain square-wave/output driver that outputs 1Hz, 4.096kHz, 8.192kHz or 32.768kHz when enabled, requires an external pullup up to 5.5V regardless of VCC, and may be left floating if unused. |
| 8 | VCC | power_in | Primary power supply, 4.5V to 5.5V; the device is fully accessible within normal limits, and reads and writes are inhibited when a backup supply is connected and VCC falls below VTP. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Analog Devices Inc Maxim Integrated |
| Package | SOIC-8 |
| Category | Clock/Timing |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply Voltage | VCC | 4.5 | 5 | 5.5 | V | 2 | |
| Logic 1 Input | VIH | 2.2 | V | 2 | |||
| Logic 0 Input | VIL | -0.3 | 0.8 | V | 2 | ||
| VBAT Battery Voltage | VBAT | 2 | 3 | 3.5 | V | 2 | |
| Input Leakage (SCL) | ILI | -1 | 1 | µA | 2 | ||
| I/O Leakage (SDA, SQW/OUT) | ILO | -1 | 1 | µA | 2 | ||
| Logic 0 Output | VOL | 0.4 | V | IOL = 5mA | 2 | ||
| Active Supply Current | ICCA | 1.5 | mA | fSCL = 100kHz | 2 | ||
| Standby Current | ICCS | 200 | µA | Note 3: VCC = 5.0V, SDA, SCL = 5.0V | 2 | ||
| VBAT Leakage Current | IBATLKG | 5 | 50 | nA | 2 | ||
| Power-Fail Voltage | VPF | 1.216 | 1.25 | 1.284 | x VBAT | VBAT = 3.0V; printed as multiple of VBAT | 2 |
| VBAT Current (OSC ON); SQW/OUT OFF | IBAT1 | 300 | 500 | nA | VCC = 0V, VBAT = 3.0V; SQW/OUT OFF | 2 | |
| VBAT Current (OSC ON); SQW/OUT ON (32kHz) | IBAT2 | 480 | 800 | nA | VCC = 0V, VBAT = 3.0V; SQW/OUT ON (32kHz) | 2 | |
| VBAT Data-Retention Current (Oscillator Off) | IBATDR | 10 | 100 | nA | VCC = 0V, VBAT = 3.0V; oscillator off | 2 | |
| SCL Clock Frequency | fSCL | 0 | 100 | kHz | 3 | ||
| Bus Free Time Between a STOP and START Condition | tBUF | 4.7 | µs | 3 | |||
| Hold Time (Repeated) START Condition | tHD:STA | 4 | µs | Note 4 | 3 | ||
| LOW Period of SCL Clock | tLOW | 4.7 | µs | 3 | |||
| HIGH Period of SCL Clock | tHIGH | 4 | µs | 3 | |||
| Setup Time for a Repeated START Condition | tSU:STA | 4.7 | µs | 3 | |||
| Data Hold Time | tHD:DAT | 0 | µs | 3 | |||
| Data Setup Time | tSU:DAT | 250 | ns | Notes 5, 6 | 3 | ||
| Rise Time of Both SDA and SCL Signals | tR | 1000 | ns | 3 | |||
| Fall Time of Both SDA and SCL Signals | tF | 300 | ns | 3 | |||
| Setup Time for STOP Condition | tSU:STO | 4.7 | µs | 3 | |||
| Pin Capacitance (SDA, SCL) | CI/O | 10 | pF | TA = +25°C | 3 | ||
| Capacitance Load for Each Bus Line | CB | 400 | pF | Note 7 | 3 | ||
| Voltage Range on Any Pin Relative to Ground | -0.5 | 7 | V | 2 | |||
| Operating Temperature Range (Commercial) | TA | 0 | 70 | °C | Noncondensing | 2 | |
| Storage Temperature Range | TSTG | -55 | 125 | °C | 2 |
CAD (KiCad official)
- Symbol:
DS1307Z+T&R - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files:
ds1307z-t-r-etched.step/ds1307z-t-r-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);ds1307z-t-r.step/ds1307z-t-r.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Analog Devices Inc Maxim Integrated datasheet (14 pp, sha256
c81233053aa1da15, retrieved 2026-10-18, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).