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docs ds1307idrg: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
viewers ds1307idrg: viewers · Ray
ds1307idrg-etched.fit.json ds1307idrg: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
ds1307idrg-etched.glb ds1307idrg: white body in tscircuit (pre-1.8 etch structure under an assembly instance); Ray 2026-10-19: black IC body… · Ray
ds1307idrg-etched.step ds1307idrg: white body in tscircuit (pre-1.8 etch structure under an assembly instance); Ray 2026-10-19: black IC body… · Ray
ds1307idrg.glb Publish 0.1.0 · Ray
ds1307idrg.kicad_mod Publish 0.1.0 · Ray
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ds1307idrg.step Publish 0.1.0 · Ray
package.json ds1307idrg: white body in tscircuit (pre-1.8 etch structure under an assembly instance); Ray 2026-10-19: black IC body… · Ray
page.json ds1307idrg: white body in tscircuit (pre-1.8 etch structure under an assembly instance); Ray 2026-10-19: black IC body… · Ray
README.md Initial commit: component/ds1307idrg · Ray

DS1307IDRG

HANSCHIP semiconductor · Real Time Clocks · SOP-8

DS1307IDRG from HANSCHIP semiconductor, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 X1 passive 32.768 kHz crystal oscillator input pin with internal load capacitance of 12.5 pF.
2 X2 passive 32.768 kHz crystal oscillator output pin; can be left floating when using external oscillator signal on X1.
3 VBAT power_in +3V battery backup input with operating range 2.0V to 3.5V; provides backup power when VCC drops below VBAT threshold.
4 GND power_in Ground reference pin.
5 SDA bidirectional Serial data input/output line for I2C serial interface; open-drain output requiring external pull-up resistor.
6 SCL bidirectional Serial clock line for I2C serial interface; open-drain output requiring external pull-up resistor.
7 SQW/OUT output Square wave or static output driver pin with open-drain output; generates 1 Hz, 4.096 kHz, 8.192 kHz, or 32.768 kHz square wave when enabled, or fixed logic level when disabled.
8 VCC power_in +5V power supply input with operating range 4.5V to 5.5V for normal operation and data read/write capability.

Key specifications

Parameter Value
Manufacturer HANSCHIP semiconductor
Package SOP-8
Category Clock/Timing
Pins 8

CAD (KiCad official)

  • Symbol: DS1307IDRG
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOP-8 (KiCad packages3D, STEP)
  • 3D model files: ds1307idrg-etched.step / ds1307idrg-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ds1307idrg.step / ds1307idrg.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: HANSCHIP semiconductor datasheet (15 pp, sha256 db9c8e274d96c9a3, retrieved 2026-09-22, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.2, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-4-6 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF