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DS1302S+T&R

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Analog Devices Inc Maxim Integrated Real Time Clocks, SOP-8-208mil. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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DS1302S+T&R

Analog Devices Inc Maxim Integrated · Real Time Clocks · SOP-8-208mil

DS1302S+T&R from Analog Devices Inc Maxim Integrated, in a SOP-8-208mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VCC2 power_in Primary power-supply pin in the dual-supply configuration that powers the DS1302 when VCC2 is greater than VCC1 + 0.2V, with supply range 2.0V to 5.5V.
2 X1 passive Connection for a standard 32.768kHz quartz crystal specified for 6pF load capacitance, and can alternatively be driven by an external 32.768kHz oscillator.
3 X2 passive Other connection for the 32.768kHz quartz crystal, which is left floating when X1 is driven by an external oscillator.
4 GND power_in Ground reference for the device.
5 CE input Chip enable input that must be driven high during any read or write, with an internal 40kΩ (typ) pulldown resistor to ground.
6 I/O bidirectional Bidirectional data pin for the 3-wire serial interface operating as an input or push-pull output, with an internal 40kΩ (typ) pulldown resistor to ground.
7 SCLK input Serial clock input that synchronizes data movement on the serial interface, with an internal 40kΩ (typ) pulldown resistor to ground.
8 VCC1 power_in Low-power and battery-backup supply pin, to which a rechargeable energy source is connected in trickle-charge systems, with supply range 2.0V to 5.5V.

Key specifications

Parameter Value
Manufacturer Analog Devices Inc Maxim Integrated
Package SOP-8-208mil
Category Clock/Timing
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Voltage Range on Any Pin Relative to Ground -0.5 7 V 10
Storage Temperature Range -55 125 °C 10
Operating Temperature Range, Commercial 0 70 °C 10
Supply Voltage VCC1, VCC2 2 3.3 5.5 V Notes 2, 10 10
Logic 1 Input VIH 2 V Note 2 10
Logic 0 Input VIL -0.3 0.3 V VCC = 2.0V (Note 2) 10
Logic 0 Input VIL -0.3 0.8 V VCC = 5V 10
Logic 1 Output VOH 1.6 V IOH = -0.4mA; VCC = 2.0V (Note 2) 10
Logic 1 Output VOH 2.4 V IOH = -1.0mA; VCC = 5V 10
Logic 0 Output VOL 0.4 V IOL = 1.5mA; VCC = 2.0V (Note 2) 10
Input Leakage ILI 85 500 µA Notes 5, 13 10
I/O Leakage ILO 85 500 µA Notes 5, 13 10
Active Supply Current (Oscillator Enabled) ICC1A 0.4 mA VCC1 = 2.0V, CH = 0 (Notes 4, 11) 10
Active Supply Current (Oscillator Enabled) ICC1A 1.2 mA VCC1 = 5V 10
Timekeeping Current (Oscillator Enabled) ICC1T 0.2 0.3 µA VCC1 = 2.0V, CH = 0 (Notes 3, 11, 13) 10
Timekeeping Current (Oscillator Enabled) ICC1T 0.45 1 µA VCC1 = 5V 10
Standby Current (Oscillator Disabled) ICC1S 1 100 nA VCC1 = 2.0V, CH = 1 (Notes 9, 11, 13) 10
Active Supply Current (Oscillator Enabled) ICC2A 0.425 mA VCC2 = 2.0V, CH = 0 (Notes 4, 12) 10
Active Supply Current (Oscillator Enabled) ICC2A 1.28 mA VCC2 = 5V 10
Timekeeping Current (Oscillator Enabled) ICC2T 25.3 µA VCC2 = 2.0V, CH = 0 (Notes 3, 12) 10
Timekeeping Current (Oscillator Enabled) ICC2T 81 µA VCC2 = 5V 10
Standby Current (Oscillator Disabled) ICC2S 25 µA VCC2 = 2.0V, CH = 1 (Notes 9, 12) 10
Standby Current (Oscillator Disabled) ICC2S 80 µA VCC2 = 5V 10
Data to CLK Setup tDC 200 ns VCC = 2.0V (Note 6) 11
Data to CLK Setup tDC 50 ns VCC = 5V 11
CLK to Data Hold tCDH 280 ns VCC = 2.0V (Note 6) 11
CLK to Data Hold tCDH 70 ns VCC = 5V 11
CLK to Data Delay tCDD 800 ns VCC = 2.0V (Notes 6, 7, 8) 11
CLK to Data Delay tCDD 200 ns VCC = 5V 11
CLK Low Time tCL 1000 ns VCC = 2.0V (Note 6) 11
CLK Low Time tCL 250 ns VCC = 5V 11
CLK High Time tCH 1000 ns VCC = 2.0V (Note 6) 11
CLK High Time tCH 250 ns VCC = 5V 11
CLK Frequency tCLK 0.5 MHz VCC = 2.0V (Note 6) 11
CLK Frequency tCLK 2 MHz VCC = 5V 11
CLK Rise and Fall tR, tF 2000 ns VCC = 2.0V 11
CLK Rise and Fall tR, tF 500 ns VCC = 5V 11
CE to CLK Setup tCC 4 µs VCC = 2.0V (Note 6) 11
CE to CLK Setup tCC 1 µs VCC = 5V 11
CLK to CE Hold tCCH 240 ns VCC = 2.0V (Note 6) 11
CLK to CE Hold tCCH 60 ns VCC = 5V 11
CE Inactive Time tCWH 4 µs VCC = 2.0V (Note 6) 11
CE Inactive Time tCWH 1 µs VCC = 5V 11
CE to I/O High Impedance tCDZ 280 ns VCC = 2.0V (Note 6) 11
CE to I/O High Impedance tCDZ 70 ns VCC = 5V 11
SCLK to I/O High Impedance tCCZ 280 ns VCC = 2.0V (Note 6) 11
SCLK to I/O High Impedance tCCZ 70 ns VCC = 5V 11

CAD (KiCad official)

  • Symbol: DS1302S+T&R
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOP-8-208mil (KiCad packages3D, STEP)
  • 3D model files: ds1302s-t-r-etched.step / ds1302s-t-r-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ds1302s-t-r.step / ds1302s-t-r.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Analog Devices Inc Maxim Integrated datasheet (13 pp, sha256 52d5b9d98f1e7da5, retrieved 2026-10-18, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF