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DS1302M
Public Made by Adomby adom
HGSEMI Real Time Clocks, SOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownDS1302M
HGSEMI · Real Time Clocks · SOP-8
DS1302M from HGSEMI, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VCC2 | power_in | Main supply pin, specified at 2.0 V to 5.5 V; the DS1302 is powered from whichever of VCC1 or VCC2 is higher, and from VCC2 when VCC2 exceeds VCC1 + 0.2 V. |
| 2 | X1 | passive | Connection to the 32.768 kHz crystal, which must have a specified load capacitance of 6 pF (CL). |
| 3 | X2 | passive | Connection to the 32.768 kHz crystal, which must have a specified load capacitance of 6 pF (CL). |
| 4 | GND | power_in | Ground reference pin for the device. |
| 5 | RST | input | Reset input: driving it high enables data transfers, driving it low aborts all transfers and places I/O in high impedance, and it must be low before VCC reaches 2.5 V at power-up. |
| 6 | I/O | bidirectional | Serial data input/output, with data sampled on SCLK rising edges for writes and output on SCLK falling edges for reads, and high impedance when RST is low. |
| 7 | SCLK | input | Serial clock input that synchronizes command and data transfers on I/O, and must be low when RST is driven high. |
| 8 | VCC1 | power_in | Backup supply pin, specified at 2.0 V to 5.5 V, which powers the device when VCC2 + 0.2 V is less than VCC1 and provides battery backup of the clock and RAM. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | HGSEMI |
| Package | SOP-8 |
| Category | Clock/Timing |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Voltage on any pin to ground | VP | -0.5 | 7 | V | 3 | ||
| Operating temperature (DS1302, not DS1302Z) | TA | 0 | 70 | ℃ | DS1302 (not DS1302Z) | 3 | |
| Storage temperature | TS | -55 | 125 | ℃ | 3 | ||
| Soldering temperature | TH | 260 | ℃ | 10 s | 3 | ||
| Supply voltage | VCC1, VCC2 | 2 | 5.5 | V | 3 | ||
| Logic 1 input voltage | VIH | 2 | V | 3 | |||
| Logic 0 input voltage | VIL | -0.3 | 0.3 | V | VCC=2.0V | 3 | |
| Logic 0 input voltage | VIL | -0.3 | 0.8 | V | VCC=5V | 3 | |
| Input capacitance | CI | 10 | pF | 3 | |||
| I/O capacitance | CI/O | 15 | pF | 3 | |||
| Input leakage current | ILI | 500 | μA | 4 | |||
| I/O leakage current | ILO | 500 | μA | 4 | |||
| Logic 1 output voltage | VOH | 1.6 | V | VCC=2.5V | 4 | ||
| Logic 1 output voltage | VOH | 2.4 | V | VCC=5V | 4 | ||
| Logic 0 output voltage | VOL | 0.4 | V | VCC=2.5V | 4 | ||
| Active supply current (VCC1) | ICC1A | 0.4 | mA | VCC1=2.5V | 4 | ||
| Active supply current (VCC1) | ICC1A | 1.2 | mA | VCC1=5V | 4 | ||
| Timekeeping current (VCC1) | ICC1T | 0.3 | μA | VCC1=2.5V | 4 | ||
| Timekeeping current (VCC1) | ICC1T | 1 | μA | VCC1=5V | 4 | ||
| Standby current (VCC1) | ICC1S | 100 | nA | VCC1=2.5V | 4 | ||
| Active supply current (VCC2) | ICC2A | 0.425 | mA | VCC2=2.5V | 4 | ||
| Active supply current (VCC2) | ICC2A | 1.28 | mA | VCC2=5V | 4 | ||
| Timekeeping current (VCC2) | ICC2T | 25.3 | μA | VCC2=2.5V | 4 | ||
| Timekeeping current (VCC2) | ICC2T | 81 | μA | VCC2=5V | 4 | ||
| Standby current (VCC2) | ICC2S | 25 | μA | VCC2=2.5V | 4 | ||
| Standby current (VCC2) | ICC2S | 80 | μA | VCC2=5V | 4 | ||
| CLK to RST hold time | tcch | 240 | ns | VCC=2V | 4 | ||
| CLK to RST hold time | tcch | 60 | ns | VCC=5V | 4 | ||
| RST inactive time | tcwh | 4 | ns | VCC=2V | 4 | ||
| RST inactive time | tcwh | 1 | ns | VCC=5V | 4 | ||
| RST to I/O high-Z | tcdz | 280 | ns | VCC=2V | 4 | ||
| RST to I/O high-Z | tcdz | 70 | ns | VCC=5V | 4 | ||
| SCLK to I/O high-Z | tccz | 280 | ns | VCC=2V | 4 | ||
| SCLK to I/O high-Z | tccz | 70 | ns | VCC=5V | 4 | ||
| Data to CLK setup time | tdc | 200 | ns | VCC=2V | 4 | ||
| Data to CLK setup time | tdc | 50 | ns | VCC=5V | 4 | ||
| CLK to Data hold time | tcdh | 280 | ns | VCC=2V | 4 | ||
| CLK to Data hold time | tcdh | 70 | ns | VCC=5V | 4 | ||
| CLK to Data delay | tcdd | 800 | ns | VCC=2V | 4 | ||
| CLK to Data delay | tcdd | 200 | ns | VCC=5V | 4 | ||
| CLK low time | tcl | 1000 | ns | VCC=2V | 4 | ||
| CLK low time | tcl | 250 | ns | VCC=5V | 4 | ||
| CLK high time | tch | 1000 | ns | VCC=2V | 4 | ||
| CLK high time | tch | 250 | ns | VCC=5V | 4 | ||
| CLK frequency | tclk | 0.5 | MHz | VCC=2V | 5 | ||
| CLK frequency | tclk | 2 | MHz | VCC=5V | 5 | ||
| CLK rise and fall time | tr, tf | 2000 | ns | VCC=2V | 5 | ||
| CLK rise and fall time | tr, tf | 500 | ns | VCC=5V | 5 | ||
| RST to CLK setup time | tCC | 4 | µs | VCC=2V | 5 | ||
| RST to CLK setup time | tCC | 1 | µs | VCC=5V | 5 | ||
| Crystal load capacitance (CL) required by 32.768 kHz crystal | CX | 6 | pF | 3 | |||
| Trickle-charge resistor R1 | R1 | 2 | kΩ | 4 | |||
| Trickle-charge resistor R2 | R2 | 4 | kΩ | 4 | |||
| Trickle-charge resistor R3 | R3 | 8 | kΩ | 4 | |||
| Trickle-charge diode forward voltage drop | VTD | 0.7 | V | 4 |
CAD (KiCad official)
- Symbol:
DS1302M - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOP-8 (KiCad packages3D, STEP)
- 3D model files:
ds1302m-etched.step/ds1302m-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);ds1302m.step/ds1302m.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: HGSEMI datasheet (15 pp, sha256
610b1880d250ea8d, retrieved 2026-10-18, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).