component

DS1302CDRG

Public Made by Adom

by adom

HANSCHIP semiconductor Real-time Clocks (RTC), SOP-8. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.

componentrtcds1302cdrg
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Commit History

13 commits ← Back to Activity
ds1302cdrg: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding)
Ray · 4872015 ·
ds1302cdrg: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero
Ray · 0c2f6be ·
ds1302cdrg: laser-etched CAD + chip hero (factory 2.0.0 backfill)
Ray · fd74381 ·
Brief states the pinout check that actually ran (was an unconditional "Datasheet-verified pinout")
Ray · 8b56ded ·
ds1302cdrg: laser-etched CAD + chip hero (factory 2.0.0 backfill)
Ray · 6bb5b8d ·
ds1302cdrg: backfill missing artifacts (variants)
Ray · 9a18107 ·
ds1302cdrg: publish the laser-etched STEP alongside the bare one
Ray · cc2e5f8 ·
Publish 0.2.0
Ray · 6c05409 ·
Set visibility: public
Ray · 5f73b7b ·
ds1302cdrg: viewers
Ray · 22cf9c1 ·
ds1302cdrg: factory component page (tier=lcsc)
Ray · 416a246 ·
Publish 0.1.0
Ray · 1217f35 ·
Initial commit: component/ds1302cdrg
Ray · 05d2007 ·