component
DS125BR111RTWR
Public Made by Adomby adom
Texas Instruments Signal Buffers, Repeaters, Splitters, WQFN-24-EP(4x4). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
← Commit history
README.mdadded+62@@ -0,0 +1,62 @@+# DS125BR111RTWR++**Texas Instruments** · Signal Buffers, Repeaters, Splitters · WQFN-24-EP(4x4)++DS125BR111RTWR from Texas Instruments, in a WQFN-24-EP(4x4). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | AD3/EQB0 | input | SMBus slave address input AD3 in SMBus mode, or EQB0 equalization level control for the B direction in Pin Mode (4-level LVCMOS). |+| 2 | AD2/EQB1 | input | SMBus slave address input AD2 in SMBus mode; as EQB1 in Pin Mode it is not used and must always be tied to GND. |+| 3 | ENSMB | input | 4-level SMBus enable: 1 kΩ to VDD = SMBus slave mode, float = read external EEPROM (master mode), 1 kΩ to GND = Pin Mode. |+| 4 | SDA/VODA_DB | bidirectional | SMBus bidirectional data pin (open drain output, needs external 2 kΩ to 5 kΩ pull-up, 3.3 V tolerant) in SMBus modes, or VODA_DB CHA output amplitude dynamic range control in Pin Mode (hold Low for SAS and PCIe). |+| 5 | SCL/VODB_DB | bidirectional | SMBus clock input in slave mode and clock output (open drain) when loading EEPROM in master mode, or VODB_DB CHB output amplitude control in Pin Mode (hold Low for SAS and PCIe). |+| 6 | PWDN | input | Power-down control: tie High = low power power-down, tie GND = normal operation. |+| 7 | OUTA+ | output | Non-inverting 50 Ω driver output of channel A, compatible with AC coupled CML inputs; AC coupling required. |+| 8 | OUTA- | output | Inverting 50 Ω driver output of channel A, compatible with AC coupled CML inputs; AC coupling required. |+| 9 | AD1/EQA1 | input | SMBus slave address input AD1 in SMBus mode; as EQA1 in Pin Mode it is not used and must always be tied to GND. |+| 10 | AD0/EQA0 | input | SMBus slave address input AD0 in SMBus mode, or EQA0 equalization level control for the A direction in Pin Mode (4-level LVCMOS). |+| 11 | INB+ | input | Non-inverting CML differential input to the equalizer of channel B with on-chip 50 Ω termination to VDD enabled by RXDET control logic; AC coupling required. |+| 12 | INB- | input | Inverting CML differential input to the equalizer of channel B with on-chip 50 Ω termination to VDD enabled by RXDET control logic; AC coupling required. |+| 13 | RES | input | Reserved pin; this input must be left floating. |+| 14 | SD_TH | input | 4-level input controlling the internal signal detect threshold, for system debug only and not controlling the high speed datapath. |+| 15 | VIN | power_in | In 3.3 V mode feed 3.3 V to VIN to power the internal regulator; in 2.5 V mode leave floating. |+| 16 | VDD_SEL | input | Controls the internal regulator: float = 2.5 V mode, tie GND = 3.3 V mode. |+| 17 | READEN/VOD_SEL | input | READEN: logic low starts external EEPROM load (ENSMB float) and must be tied low for AD[3:0] to be active in SMBus slave mode; VOD_SEL controls the low-frequency ratio of input to output voltage amplitude in Pin Mode. |+| 18 | DONE/RXDET | bidirectional | DONE output: HIGH = external EEPROM load failed or incomplete, LOW = passed; RXDET input in Pin Mode selects 50 Ω or >50 kΩ input termination (set to logic 1 for SAS/SATA to keep termination enabled). |+| 19 | OUTB- | output | Inverting 50 Ω driver output of channel B, compatible with AC coupled CML inputs; AC coupling required. |+| 20 | OUTB+ | output | Non-inverting 50 Ω driver output of channel B, compatible with AC coupled CML inputs; AC coupling required. |+| 21 | VDD | power_in | CML/analog power supply pin: connect to 2.5 V in 2.5 V mode (2.375 V to 2.625 V), or decouple with a cap to GND in 3.3 V mode. |+| 22 | VDD | power_in | CML/analog power supply pin: connect to 2.5 V in 2.5 V mode (2.375 V to 2.625 V), or decouple with a cap to GND in 3.3 V mode. |+| 23 | INA- | input | Inverting CML differential input to the equalizer of channel A with on-chip 50 Ω termination to VDD enabled by RXDET control logic; AC coupling required. |+| 24 | INA+ | input | Non-inverting CML differential input to the equalizer of channel A with on-chip 50 Ω termination to VDD enabled by RXDET control logic; AC coupling required. |+| 25 | GND | power_in | Die attach pad and the only device ground connection; connect to GND through multiple (minimum of 4) vias for electrical and thermal performance. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | WQFN-24-EP(4x4) |+| Category | Interface |+| Pins | 25 |++## CAD (KiCad official)++- Symbol: `DS125BR111RTWR`+- Footprint: `Package_DFN_QFN:QFN-24-1EP_4x4mm_P0.5mm_EP2.6x2.6mm`+- 3D model: WQFN-24-EP(4x4) (KiCad packages3D, STEP)+- 3D model files: `ds125br111rtwr-etched.step` / `ds125br111rtwr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `ds125br111rtwr.step` / `ds125br111rtwr.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/ds125br111) (45 pp, sha256 `0b7cee4cabe65671`, retrieved 2026-10-06, tier: lcsc)+- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-4-5-20251001` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/ds125br111rtwr-datasheet.pdf)
page.jsonadded+264@@ -0,0 +1,264 @@+{+ "slug": "ds125br111rtwr",+ "version": "0.1.0",+ "type": "component",+ "description": "Texas Instruments Signal Buffers, Repeaters, Splitters, WQFN-24-EP(4x4). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",+ "tags": [+ "component",+ "interface",+ "ds125br111rtwr",+ "factory-2.0.0",+ "extractor-text"+ ],+ "dependencies": {},+ "hero": {+ "type": "image",+ "path": "docs/hero.png"+ },+ "files": [+ "page.json",+ "README.md",+ "ds125br111rtwr.kicad_sym",+ "ds125br111rtwr.kicad_mod",+ "ds125br111rtwr.glb",+ "ds125br111rtwr.step",+ "ds125br111rtwr.lbr",+ "docs/hero.png",+ "docs/ds125br111rtwr-datasheet.pdf",+ "viewers/symbol.html",+ "viewers/footprint.html",+ "ds125br111rtwr-hero.glb",+ "ds125br111rtwr-hero.overlay.json"+ ],+ "component": {+ "mpn": "DS125BR111RTWR",+ "manufacturer": "Texas Instruments",+ "package": "WQFN-24-EP(4x4)",+ "pin_count": 25,+ "category": "Interface",+ "subcategory": "Signal Buffers, Repeaters, Splitters",+ "datasheet": "https://www.ti.com/cn/lit/gpn/ds125br111",+ "parts": {+ "symbol": "ds125br111rtwr.kicad_sym",+ "footprint": "ds125br111rtwr.kicad_mod",+ "model_3d": "ds125br111rtwr-hero.glb",+ "model_3d_plain": "ds125br111rtwr.glb",+ "model_3d_step": "ds125br111rtwr-etched.step",+ "model_3d_step_plain": "ds125br111rtwr.step",+ "lbr": "ds125br111rtwr.lbr"+ },+ "distributor_links": {+ "lcsc": 2675195,+ "digikey": "296-40090-2-ND",+ "mouser": "595-DS125BR111RTWR"+ },+ "distributor_check": {+ "checked_at": "2026-10-06T04:24:14Z",+ "source": "Component Ocean /api/assign-pns",+ "digikey": {+ "pn": "296-40090-2-ND",+ "status": "found",+ "lifecycle": "Active"+ },+ "mouser": {+ "pn": "595-DS125BR111RTWR",+ "status": "found"+ }+ },+ "pins": [+ {+ "number": "1",+ "name": "AD3/EQB0",+ "type": "input",+ "description": "SMBus slave address input AD3 in SMBus mode, or EQB0 equalization level control for the B direction in Pin Mode (4-level LVCMOS)."+ },+ {+ "number": "2",+ "name": "AD2/EQB1",+ "type": "input",+ "description": "SMBus slave address input AD2 in SMBus mode; as EQB1 in Pin Mode it is not used and must always be tied to GND."+ },+ {+ "number": "3",+ "name": "ENSMB",+ "type": "input",+ "description": "4-level SMBus enable: 1 kΩ to VDD = SMBus slave mode, float = read external EEPROM (master mode), 1 kΩ to GND = Pin Mode."+ },+ {+ "number": "4",+ "name": "SDA/VODA_DB",+ "type": "bidirectional",+ "description": "SMBus bidirectional data pin (open drain output, needs external 2 kΩ to 5 kΩ pull-up, 3.3 V tolerant) in SMBus modes, or VODA_DB CHA output amplitude dynamic range control in Pin Mode (hold Low for SAS and PCIe)."+ },+ {+ "number": "5",+ "name": "SCL/VODB_DB",+ "type": "bidirectional",+ "description": "SMBus clock input in slave mode and clock output (open drain) when loading EEPROM in master mode, or VODB_DB CHB output amplitude control in Pin Mode (hold Low for SAS and PCIe)."+ },+ {+ "number": "6",+ "name": "PWDN",+ "type": "input",+ "description": "Power-down control: tie High = low power power-down, tie GND = normal operation."+ },+ {+ "number": "7",+ "name": "OUTA+",+ "type": "output",+ "description": "Non-inverting 50 Ω driver output of channel A, compatible with AC coupled CML inputs; AC coupling required."+ },+ {+ "number": "8",+ "name": "OUTA-",+ "type": "output",+ "description": "Inverting 50 Ω driver output of channel A, compatible with AC coupled CML inputs; AC coupling required."+ },+ {+ "number": "9",+ "name": "AD1/EQA1",+ "type": "input",+ "description": "SMBus slave address input AD1 in SMBus mode; as EQA1 in Pin Mode it is not used and must always be tied to GND."+ },+ {+ "number": "10",+ "name": "AD0/EQA0",+ "type": "input",+ "description": "SMBus slave address input AD0 in SMBus mode, or EQA0 equalization level control for the A direction in Pin Mode (4-level LVCMOS)."+ },+ {+ "number": "11",+ "name": "INB+",+ "type": "input",+ "description": "Non-inverting CML differential input to the equalizer of channel B with on-chip 50 Ω termination to VDD enabled by RXDET control logic; AC coupling required."+ },+ {+ "number": "12",+ "name": "INB-",+ "type": "input",+ "description": "Inverting CML differential input to the equalizer of channel B with on-chip 50 Ω termination to VDD enabled by RXDET control logic; AC coupling required."+ },+ {+ "number": "13",+ "name": "RES",+ "type": "input",+ "description": "Reserved pin; this input must be left floating."+ },+ {+ "number": "14",+ "name": "SD_TH",+ "type": "input",+ "description": "4-level input controlling the internal signal detect threshold, for system debug only and not controlling the high speed datapath."+ },+ {+ "number": "15",+ "name": "VIN",+ "type": "power_in",+ "description": "In 3.3 V mode feed 3.3 V to VIN to power the internal regulator; in 2.5 V mode leave floating."+ },+ {+ "number": "16",+ "name": "VDD_SEL",+ "type": "input",+ "description": "Controls the internal regulator: float = 2.5 V mode, tie GND = 3.3 V mode."+ },+ {+ "number": "17",+ "name": "READEN/VOD_SEL",+ "type": "input",+ "description": "READEN: logic low starts external EEPROM load (ENSMB float) and must be tied low for AD[3:0] to be active in SMBus slave mode; VOD_SEL controls the low-frequency ratio of input to output voltage amplitude in Pin Mode."+ },+ {+ "number": "18",+ "name": "DONE/RXDET",+ "type": "bidirectional",+ "description": "DONE output: HIGH = external EEPROM load failed or incomplete, LOW = passed; RXDET input in Pin Mode selects 50 Ω or >50 kΩ input termination (set to logic 1 for SAS/SATA to keep termination enabled)."+ },+ {+ "number": "19",+ "name": "OUTB-",+ "type": "output",+ "description": "Inverting 50 Ω driver output of channel B, compatible with AC coupled CML inputs; AC coupling required."+ },+ {+ "number": "20",+ "name": "OUTB+",+ "type": "output",+ "description": "Non-inverting 50 Ω driver output of channel B, compatible with AC coupled CML inputs; AC coupling required."+ },+ {+ "number": "21",+ "name": "VDD",+ "type": "power_in",+ "description": "CML/analog power supply pin: connect to 2.5 V in 2.5 V mode (2.375 V to 2.625 V), or decouple with a cap to GND in 3.3 V mode."+ },+ {+ "number": "22",+ "name": "VDD",+ "type": "power_in",+ "description": "CML/analog power supply pin: connect to 2.5 V in 2.5 V mode (2.375 V to 2.625 V), or decouple with a cap to GND in 3.3 V mode."+ },+ {+ "number": "23",+ "name": "INA-",+ "type": "input",+ "description": "Inverting CML differential input to the equalizer of channel A with on-chip 50 Ω termination to VDD enabled by RXDET control logic; AC coupling required."+ },+ {+ "number": "24",+ "name": "INA+",+ "type": "input",+ "description": "Non-inverting CML differential input to the equalizer of channel A with on-chip 50 Ω termination to VDD enabled by RXDET control logic; AC coupling required."+ },+ {+ "number": "25",+ "name": "GND",+ "type": "power_in",+ "description": "Die attach pad and the only device ground connection; connect to GND through multiple (minimum of 4) vias for electrical and thermal performance."+ }+ ],+ "provenance": {+ "extractor": "extract_pins 0.3",+ "factory_chain": {+ "factory": "2.0.0",+ "extractor": "extract_pins 0.3",+ "primary_model": "claude-haiku-4-5-20251001",+ "primary_mode": "text",+ "consensus_model": "claude-sonnet-5-5",+ "consensus": "agreed",+ "guards": "pin_guards 0.1: passed",+ "guard_notes": [+ "extractor flagged: Pins have dual functions that depend on operating mode (SMBus vs PIN vs EEPROM): ensure correct mode; Pin 18 (RXDET/DONE) changes from input to output depending on operating mode; classified as tri_stat",+ "exposed pad 25 added from the footprint",+ "dropped thermal pad ['EP'] absent from footprint"+ ],+ "pages_sent": 11,+ "cost_usd": 0.1785,+ "at": "2026-10-06T04:23:58"+ },+ "datasheet": {+ "url": "https://www.ti.com/cn/lit/gpn/ds125br111",+ "pages": 45,+ "sha256": "0b7cee4cabe65671",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 25,+ "described": 25,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ }+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}