main
Ray Publish 0.1.0 c8e8737 13d ago
{
  "slug": "ds100br410sq",
  "version": "0.1.0",
  "type": "component",
  "description": "Texas Instruments Signal Buffers, Repeaters, Splitters, WQFN-48-EP(7x7). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "tags": [
    "component",
    "interface",
    "ds100br410sq",
    "factory-2.0.0",
    "extractor-text"
  ],
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "ds100br410sq.kicad_sym",
    "ds100br410sq.kicad_mod",
    "ds100br410sq.glb",
    "ds100br410sq.step",
    "ds100br410sq.lbr",
    "docs/hero.png",
    "docs/ds100br410sq-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html",
    "ds100br410sq-hero.glb",
    "ds100br410sq-hero.overlay.json"
  ],
  "component": {
    "mpn": "DS100BR410SQ",
    "manufacturer": "Texas Instruments",
    "package": "WQFN-48-EP(7x7)",
    "pin_count": 49,
    "category": "Interface",
    "subcategory": "Signal Buffers, Repeaters, Splitters",
    "datasheet": "https://www.ti.com/cn/lit/gpn/ds100br410",
    "parts": {
      "symbol": "ds100br410sq.kicad_sym",
      "footprint": "ds100br410sq.kicad_mod",
      "model_3d": "ds100br410sq-hero.glb",
      "model_3d_plain": "ds100br410sq.glb",
      "model_3d_step": "ds100br410sq-etched.step",
      "model_3d_step_plain": "ds100br410sq.step",
      "lbr": "ds100br410sq.lbr"
    },
    "distributor_links": {
      "lcsc": "C2675186"
    },
    "distributor_check": {
      "checked_at": "2026-10-08T23:03:05Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": null,
        "status": "no match"
      },
      "mouser": {
        "pn": null,
        "status": "no match"
      }
    },
    "pins": [
      {
        "number": "1",
        "name": "IN_0+",
        "type": "input",
        "description": "Non-inverting CML differential input to the channel 0 equalizer, with an on-chip 100 Ω terminating resistor between IN_0+ and IN_0-."
      },
      {
        "number": "2",
        "name": "IN_0-",
        "type": "input",
        "description": "Inverting CML differential input to the channel 0 equalizer, with an on-chip 100 Ω terminating resistor between IN_0+ and IN_0-."
      },
      {
        "number": "3",
        "name": "VDD",
        "type": "power_in",
        "description": "Supply pin, VDD = 2.5 V ±5% (2.375 V to 2.625 V)."
      },
      {
        "number": "4",
        "name": "IN_1+",
        "type": "input",
        "description": "Non-inverting CML differential input to the channel 1 equalizer, with an on-chip 100 Ω terminating resistor between IN_1+ and IN_1-."
      },
      {
        "number": "5",
        "name": "IN_1-",
        "type": "input",
        "description": "Inverting CML differential input to the channel 1 equalizer, with an on-chip 100 Ω terminating resistor between IN_1+ and IN_1-."
      },
      {
        "number": "6",
        "name": "VDD",
        "type": "power_in",
        "description": "Supply pin, VDD = 2.5 V ±5% (2.375 V to 2.625 V)."
      },
      {
        "number": "7",
        "name": "VDD",
        "type": "power_in",
        "description": "Supply pin, VDD = 2.5 V ±5% (2.375 V to 2.625 V)."
      },
      {
        "number": "8",
        "name": "IN_2+",
        "type": "input",
        "description": "Non-inverting CML differential input to the channel 2 equalizer, with an on-chip 100 Ω terminating resistor between IN_2+ and IN_2-."
      },
      {
        "number": "9",
        "name": "IN_2-",
        "type": "input",
        "description": "Inverting CML differential input to the channel 2 equalizer, with an on-chip 100 Ω terminating resistor between IN_2+ and IN_2-."
      },
      {
        "number": "10",
        "name": "VDD",
        "type": "power_in",
        "description": "Supply pin, VDD = 2.5 V ±5% (2.375 V to 2.625 V)."
      },
      {
        "number": "11",
        "name": "IN_3+",
        "type": "input",
        "description": "Non-inverting CML differential input to the channel 3 equalizer, with an on-chip 100 Ω terminating resistor between IN_3+ and IN_3-."
      },
      {
        "number": "12",
        "name": "IN_3-",
        "type": "input",
        "description": "Inverting CML differential input to the channel 3 equalizer, with an on-chip 100 Ω terminating resistor between IN_3+ and IN_3-."
      },
      {
        "number": "13",
        "name": "VDD",
        "type": "power_in",
        "description": "Supply pin, VDD = 2.5 V ±5% (2.375 V to 2.625 V)."
      },
      {
        "number": "14",
        "name": "BST_1",
        "type": "input",
        "description": "Equalizer boost select bit 1 (LVCMOS 2.5 V) for all channels in pin mode, internally pulled high; see Table 1 for the boost levels."
      },
      {
        "number": "15",
        "name": "VDD",
        "type": "power_in",
        "description": "Supply pin, VDD = 2.5 V ±5% (2.375 V to 2.625 V)."
      },
      {
        "number": "16",
        "name": "CS",
        "type": "input",
        "description": "SMBus chip select (3.3 V LVCMOS tolerant); high enables access to the SMBus registers, low disables them."
      },
      {
        "number": "17",
        "name": "SDC",
        "type": "input",
        "description": "SMBus clock input (3.3 V LVCMOS tolerant); an external pull-up may be required depending on the host."
      },
      {
        "number": "18",
        "name": "SDA",
        "type": "bidirectional",
        "description": "SMBus data input / open-drain output (3.3 V LVCMOS tolerant); an external pull-up resistor is required, 1 kΩ to 5 kΩ."
      },
      {
        "number": "19",
        "name": "VOD_SEL",
        "type": "input",
        "description": "Four-level analog input setting the CML output differential amplitude: tie to VDD = 1.2 Vp-p, open = 1.0 Vp-p, 20 kΩ to GND = 800 mVp-p, tie to GND = 600 mVp-p."
      },
      {
        "number": "20",
        "name": "DE_SEL",
        "type": "input",
        "description": "Four-level analog input setting output de-emphasis: tie to VDD = -9 dB, open = -6 dB, 20 kΩ to GND = -3 dB, tie to GND = 0 dB."
      },
      {
        "number": "21",
        "name": "PIN_MODE",
        "type": "input",
        "description": "Pin mode control (2.5 V LVCMOS): high selects pin control mode, low selects SMBus control mode; internally pulled high."
      },
      {
        "number": "22",
        "name": "GND",
        "type": "power_in",
        "description": "Ground reference."
      },
      {
        "number": "23",
        "name": "BST_0",
        "type": "input",
        "description": "Equalizer boost select bit 0 (2.5 V LVCMOS) for all channels in pin mode, internally pulled low; see Table 1 for the boost levels."
      },
      {
        "number": "24",
        "name": "GND",
        "type": "power_in",
        "description": "Ground reference."
      },
      {
        "number": "25",
        "name": "OUT_3-",
        "type": "output",
        "description": "Inverting CML differential output from the channel 3 driver, with an on-chip 100 Ω terminating resistor between OUT_3+ and OUT_3-."
      },
      {
        "number": "26",
        "name": "OUT_3+",
        "type": "output",
        "description": "Non-inverting CML differential output from the channel 3 driver, with an on-chip 100 Ω terminating resistor between OUT_3+ and OUT_3-."
      },
      {
        "number": "27",
        "name": "GND",
        "type": "power_in",
        "description": "Ground reference."
      },
      {
        "number": "28",
        "name": "OUT_2-",
        "type": "output",
        "description": "Inverting CML differential output from the channel 2 driver, with an on-chip 100 Ω terminating resistor between OUT_2+ and OUT_2-."
      },
      {
        "number": "29",
        "name": "OUT_2+",
        "type": "output",
        "description": "Non-inverting CML differential output from the channel 2 driver, with an on-chip 100 Ω terminating resistor between OUT_2+ and OUT_2-."
      },
      {
        "number": "30",
        "name": "GND",
        "type": "power_in",
        "description": "Ground reference."
      },
      {
        "number": "31",
        "name": "GND",
        "type": "power_in",
        "description": "Ground reference."
      },
      {
        "number": "32",
        "name": "OUT_1-",
        "type": "output",
        "description": "Inverting CML differential output from the channel 1 driver, with an on-chip 100 Ω terminating resistor between OUT_1+ and OUT_1-."
      },
      {
        "number": "33",
        "name": "OUT_1+",
        "type": "output",
        "description": "Non-inverting CML differential output from the channel 1 driver, with an on-chip 100 Ω terminating resistor between OUT_1+ and OUT_1-."
      },
      {
        "number": "34",
        "name": "GND",
        "type": "power_in",
        "description": "Ground reference."
      },
      {
        "number": "35",
        "name": "OUT_0-",
        "type": "output",
        "description": "Inverting CML differential output from the channel 0 driver, with an on-chip 100 Ω terminating resistor between OUT_0+ and OUT_0-."
      },
      {
        "number": "36",
        "name": "OUT_0+",
        "type": "output",
        "description": "Non-inverting CML differential output from the channel 0 driver, with an on-chip 100 Ω terminating resistor between OUT_0+ and OUT_0-."
      },
      {
        "number": "37",
        "name": "BST_2",
        "type": "input",
        "description": "Equalizer boost select bit 2 (2.5 V LVCMOS) for all channels in pin mode, internally pulled high; see Table 1 for the boost levels."
      },
      {
        "number": "38",
        "name": "EN3",
        "type": "input",
        "description": "Enable input for channel 3 (2.5 V LVCMOS): high for normal operation, low selects standby; internally pulled high."
      },
      {
        "number": "39",
        "name": "SD3",
        "type": "output",
        "description": "Signal detect output for channel 3 (2.5 V LVCMOS): high when a signal is detected, low when no signal is detected."
      },
      {
        "number": "40",
        "name": "EN2",
        "type": "input",
        "description": "Enable input for channel 2 (2.5 V LVCMOS): high for normal operation, low selects standby; internally pulled high."
      },
      {
        "number": "41",
        "name": "SD2",
        "type": "output",
        "description": "Signal detect output for channel 2 (2.5 V LVCMOS): high when a signal is detected, low when no signal is detected."
      },
      {
        "number": "42",
        "name": "EN1",
        "type": "input",
        "description": "Enable input for channel 1 (2.5 V LVCMOS): high for normal operation, low selects standby; internally pulled high."
      },
      {
        "number": "43",
        "name": "SD1",
        "type": "output",
        "description": "Signal detect output for channel 1 (2.5 V LVCMOS): high when a signal is detected, low when no signal is detected."
      },
      {
        "number": "44",
        "name": "EN0",
        "type": "input",
        "description": "Enable input for channel 0 (2.5 V LVCMOS): high for normal operation, low selects standby; internally pulled high."
      },
      {
        "number": "45",
        "name": "SD0",
        "type": "output",
        "description": "Signal detect output for channel 0 (2.5 V LVCMOS): high when a signal is detected, low when no signal is detected."
      },
      {
        "number": "46",
        "name": "VDD",
        "type": "power_in",
        "description": "Supply pin, VDD = 2.5 V ±5% (2.375 V to 2.625 V)."
      },
      {
        "number": "47",
        "name": "OOB_DIS",
        "type": "input",
        "description": "Out-of-band disable input (2.5 V LVCMOS): high disables OOB, low enables it; internally pulled low."
      },
      {
        "number": "48",
        "name": "RES",
        "type": "unconnected",
        "description": "Reserved, do not connect."
      },
      {
        "number": "49",
        "name": "EP",
        "type": "passive",
        "description": "Exposed pad (from the footprint; not named in the datasheet pin table)."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.3",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.3",
        "primary_model": "claude-haiku-5-5",
        "primary_mode": "text",
        "consensus_model": "claude-sonnet-5-5",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [
          "extractor flagged: The connection diagram text on page 2 is scrambled in extraction, so pin numbers were taken from the; The exposed pad (DAP) is not a numbered lead. It is listed with the number 'DAP' as a placeholder, n; Pin 48 (RES) is marked as reserved, do not connect; it is typed as unconnected, following the datash",
          "exposed pad 49 added from the footprint",
          "dropped thermal pad ['EP'] absent from footprint"
        ],
        "pages_sent": 10,
        "cost_usd": 0.0943,
        "at": "2026-10-08T23:02:09"
      },
      "datasheet": {
        "url": "https://www.ti.com/cn/lit/gpn/ds100br410",
        "pages": 26,
        "sha256": "8e94d1ce609c1af9",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 49,
        "described": 49,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "models_3d": [
      {
        "file": "ds100br410sq.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          7.0,
          7.0,
          0.77
        ],
        "zmin_mm": 0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "f2b38b0b4bf967c77e683e8d4599608b9f0503055ec535b93c4ebb5d0163e916",
        "checked": "2026-10-08",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "ds100br410sq-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          7.0,
          7.0,
          0.77
        ],
        "zmin_mm": 0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "aabbceb31779874cc402e7ce658ef03d8e9c8b8fa57d596ab5fe3c78cbd900d2",
        "checked": "2026-10-08",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  }
}