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DS08MB200TSQX
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Texas Instruments LVDS ICs, WQFN-48-EP(7x7.3). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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README.mdadded+85@@ -0,0 +1,85 @@+# DS08MB200TSQX++**Texas Instruments** · LVDS ICs · WQFN-48-EP(7x7.3)++DS08MB200TSQX from Texas Instruments, in a WQFN-48-EP(7x7.3). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | N/C | unconnected | No connect pin, listed as N/C in the pin description table. |+| 2 | GND | power_in | Ground reference for LVDS and CMOS circuitry. |+| 3 | GND | power_in | Ground reference for LVDS and CMOS circuitry. |+| 4 | ENL_1 | input | LVTTL output enable control for the Line-side channel 1 output driver; each Line-side output driver has its own enable pin. |+| 5 | N/C | unconnected | No connect pin, listed as N/C in the pin description table. |+| 6 | VDD | power_in | Power supply pin, VDD = 3.3V ±0.3V (recommended operating supply 3.0V to 3.6V). |+| 7 | LO_1+ | output | Line-side channel 1 non-inverting LVDS differential output, LVDS compatible. |+| 8 | LO_1- | output | Line-side channel 1 inverting LVDS differential output, LVDS compatible. |+| 9 | LI_1+ | input | Line-side channel 1 non-inverting differential input, LVDS, Bus LVDS, CML, or LVPECL compatible, with on-chip 100 Ω input termination. |+| 10 | LI_1- | input | Line-side channel 1 inverting differential input, LVDS, Bus LVDS, CML, or LVPECL compatible, with on-chip 100 Ω input termination. |+| 11 | MUX_S1 | input | Mux select control input for channel 1, selects whether Switch-side A or B input is passed to the Line-side (LVTTL). |+| 12 | VDD | power_in | Power supply pin, VDD = 3.3V ±0.3V. |+| 13 | ENA_1 | input | LVTTL output enable control for the Switch A-side channel 1 output driver; each A-side driver has its own enable pin. |+| 14 | ENB_1 | input | LVTTL output enable control for the Switch B-side channel 1 output driver; each B-side driver has its own enable pin. |+| 15 | SOA_1+ | output | Switch A-side channel 1 non-inverting LVDS differential output, LVDS compatible (point-to-point use only, not multidrop BLVDS). |+| 16 | SOA_1- | output | Switch A-side channel 1 inverting LVDS differential output, LVDS compatible (point-to-point use only, not multidrop BLVDS). |+| 17 | SOB_1+ | output | Switch B-side channel 1 non-inverting LVDS differential output, LVDS compatible (point-to-point use only, not multidrop BLVDS). |+| 18 | SOB_1- | output | Switch B-side channel 1 inverting LVDS differential output, LVDS compatible (point-to-point use only, not multidrop BLVDS). |+| 19 | SIA_1+ | input | Switch A-side channel 1 non-inverting differential input, LVDS, Bus LVDS, CML, or LVPECL compatible. |+| 20 | SIA_1- | input | Switch A-side channel 1 inverting differential input, LVDS, Bus LVDS, CML, or LVPECL compatible. |+| 21 | SIB_1+ | input | Switch B-side channel 1 non-inverting differential input, LVDS, Bus LVDS, CML, or LVPECL compatible. |+| 22 | SIB_1- | input | Switch B-side channel 1 inverting differential input, LVDS, Bus LVDS, CML, or LVPECL compatible. |+| 23 | N/C | unconnected | No connect pin, listed as N/C in the pin description table. |+| 24 | N/C | unconnected | No connect pin, listed as N/C in the pin description table. |+| 25 | N/C | unconnected | No connect pin, listed as N/C in the pin description table. |+| 26 | N/C | unconnected | No connect pin, listed as N/C in the pin description table. |+| 27 | SIB_0- | input | Switch B-side channel 0 inverting differential input, LVDS, Bus LVDS, CML, or LVPECL compatible. |+| 28 | SIB_0+ | input | Switch B-side channel 0 non-inverting differential input, LVDS, Bus LVDS, CML, or LVPECL compatible. |+| 29 | SIA_0- | input | Switch A-side channel 0 inverting differential input, LVDS, Bus LVDS, CML, or LVPECL compatible. |+| 30 | SIA_0+ | input | Switch A-side channel 0 non-inverting differential input, LVDS, Bus LVDS, CML, or LVPECL compatible. |+| 31 | SOB_0- | output | Switch B-side channel 0 inverting LVDS differential output, LVDS compatible (point-to-point use only, not multidrop BLVDS). |+| 32 | SOB_0+ | output | Switch B-side channel 0 non-inverting LVDS differential output, LVDS compatible (point-to-point use only, not multidrop BLVDS). |+| 33 | SOA_0- | output | Switch A-side channel 0 inverting LVDS differential output, LVDS compatible (point-to-point use only, not multidrop BLVDS). |+| 34 | SOA_0+ | output | Switch A-side channel 0 non-inverting LVDS differential output, LVDS compatible (point-to-point use only, not multidrop BLVDS). |+| 35 | ENB_0 | input | LVTTL output enable control for the Switch B-side channel 0 output driver; each B-side driver has its own enable pin. |+| 36 | ENA_0 | input | LVTTL output enable control for the Switch A-side channel 0 output driver; each A-side driver has its own enable pin. |+| 37 | VDD | power_in | Power supply pin, VDD = 3.3V ±0.3V. |+| 38 | MUX_S0 | input | Mux select control input for channel 0, selects whether Switch-side A or B input is passed to the Line-side (LVTTL). |+| 39 | LI_0- | input | Line-side channel 0 inverting differential input, LVDS, Bus LVDS, CML, or LVPECL compatible, with on-chip 100 Ω input termination. |+| 40 | LI_0+ | input | Line-side channel 0 non-inverting differential input, LVDS, Bus LVDS, CML, or LVPECL compatible, with on-chip 100 Ω input termination. |+| 41 | LO_0- | output | Line-side channel 0 inverting LVDS differential output, LVDS compatible. |+| 42 | LO_0+ | output | Line-side channel 0 non-inverting LVDS differential output, LVDS compatible. |+| 43 | VDD | power_in | Power supply pin, VDD = 3.3V ±0.3V. |+| 44 | N/C | unconnected | No connect pin, listed as N/C in the pin description table. |+| 45 | ENL_0 | input | LVTTL output enable control for the Line-side channel 0 output driver; each Line-side output driver has its own enable pin. |+| 46 | GND | power_in | Ground reference for LVDS and CMOS circuitry. |+| 47 | GND | power_in | Ground reference for LVDS and CMOS circuitry. |+| 48 | VDD | power_in | Power supply pin, VDD = 3.3V ±0.3V. |+| 49 | DAP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | WQFN-48-EP(7x7.3) |+| Category | Interface |+| Pins | 49 |++## CAD (KiCad official)++- Symbol: `DS08MB200TSQX`+- Footprint: `Package_DFN_QFN:QFN-48-1EP_7x7mm_P0.5mm_EP5.15x5.15mm`+- 3D model: WQFN-48-EP(7x7.3) (KiCad packages3D, STEP)+- 3D model files: `ds08mb200tsqx-etched.step` / `ds08mb200tsqx-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `ds08mb200tsqx.step` / `ds08mb200tsqx.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/ds08mb200) (16 pp, sha256 `d7c79c9325619d86`, retrieved 2026-10-08, tier: lcsc)+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/ds08mb200tsqx-datasheet.pdf)
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each Line-side output driver has its own enable pin."+ },+ {+ "number": "5",+ "name": "N/C",+ "type": "unconnected",+ "description": "No connect pin, listed as N/C in the pin description table."+ },+ {+ "number": "6",+ "name": "VDD",+ "type": "power_in",+ "description": "Power supply pin, VDD = 3.3V ±0.3V (recommended operating supply 3.0V to 3.6V)."+ },+ {+ "number": "7",+ "name": "LO_1+",+ "type": "output",+ "description": "Line-side channel 1 non-inverting LVDS differential output, LVDS compatible."+ },+ {+ "number": "8",+ "name": "LO_1-",+ "type": "output",+ "description": "Line-side channel 1 inverting LVDS differential output, LVDS compatible."+ },+ {+ "number": "9",+ "name": "LI_1+",+ "type": "input",+ "description": "Line-side channel 1 non-inverting differential input, LVDS, Bus LVDS, CML, or LVPECL compatible, with on-chip 100 Ω input termination."+ },+ {+ "number": "10",+ "name": "LI_1-",+ "type": "input",+ "description": "Line-side channel 1 inverting differential input, LVDS, Bus LVDS, CML, or LVPECL compatible, with on-chip 100 Ω input termination."+ },+ {+ "number": "11",+ "name": "MUX_S1",+ "type": "input",+ "description": "Mux select control input for channel 1, selects whether Switch-side A or B input is passed to the Line-side (LVTTL)."+ },+ {+ "number": "12",+ "name": "VDD",+ "type": "power_in",+ "description": "Power supply pin, VDD = 3.3V ±0.3V."+ },+ {+ "number": "13",+ "name": "ENA_1",+ "type": "input",+ "description": "LVTTL output enable control for the Switch A-side channel 1 output driver; each A-side driver has its own enable pin."+ },+ {+ "number": "14",+ "name": "ENB_1",+ "type": "input",+ "description": "LVTTL output enable control for the Switch B-side channel 1 output driver; each B-side driver has its own enable pin."+ },+ {+ "number": "15",+ "name": "SOA_1+",+ "type": "output",+ "description": "Switch A-side channel 1 non-inverting LVDS differential output, LVDS compatible (point-to-point use only, not multidrop BLVDS)."+ },+ {+ "number": "16",+ "name": "SOA_1-",+ "type": "output",+ "description": "Switch A-side channel 1 inverting LVDS differential output, LVDS compatible (point-to-point use only, not multidrop BLVDS)."+ },+ {+ "number": "17",+ "name": "SOB_1+",+ "type": "output",+ "description": "Switch B-side channel 1 non-inverting LVDS differential output, LVDS compatible (point-to-point use only, not multidrop BLVDS)."+ },+ {+ "number": "18",+ "name": "SOB_1-",+ "type": "output",+ "description": "Switch B-side channel 1 inverting LVDS differential output, LVDS compatible (point-to-point use only, not multidrop BLVDS)."+ },+ {+ "number": "19",+ "name": "SIA_1+",+ "type": "input",+ "description": "Switch A-side channel 1 non-inverting differential input, LVDS, Bus LVDS, CML, or LVPECL compatible."+ },+ {+ "number": "20",+ "name": "SIA_1-",+ "type": "input",+ "description": "Switch A-side channel 1 inverting differential input, LVDS, Bus LVDS, CML, or LVPECL compatible."+ },+ {+ "number": "21",+ "name": "SIB_1+",+ "type": "input",+ "description": "Switch B-side channel 1 non-inverting differential input, LVDS, Bus LVDS, CML, or LVPECL compatible."+ },+ {+ "number": "22",+ "name": "SIB_1-",+ "type": "input",+ "description": "Switch B-side channel 1 inverting differential input, LVDS, Bus LVDS, CML, or LVPECL compatible."+ },+ {+ "number": "23",+ "name": "N/C",+ "type": "unconnected",+ "description": "No connect pin, listed as N/C in the pin description table."+ },+ {+ "number": "24",+ "name": "N/C",+ "type": "unconnected",+ "description": "No connect pin, listed as N/C in the pin description table."+ },+ {+ "number": "25",+ "name": "N/C",+ "type": "unconnected",+ "description": "No connect pin, listed as N/C in the pin description table."+ },+ {+ "number": "26",+ "name": "N/C",+ "type": "unconnected",+ "description": "No connect pin, listed as N/C in the pin description table."+ },+ {+ "number": "27",+ "name": "SIB_0-",+ "type": "input",+ "description": "Switch B-side channel 0 inverting differential input, LVDS, Bus LVDS, CML, or LVPECL compatible."+ },+ {+ "number": "28",+ "name": "SIB_0+",+ "type": "input",+ "description": "Switch B-side channel 0 non-inverting differential input, LVDS, Bus LVDS, CML, or LVPECL compatible."+ },+ {+ "number": "29",+ "name": "SIA_0-",+ "type": "input",+ "description": "Switch A-side channel 0 inverting differential input, LVDS, Bus LVDS, CML, or LVPECL compatible."+ },+ {+ "number": "30",+ "name": "SIA_0+",+ "type": "input",+ "description": "Switch A-side channel 0 non-inverting differential input, LVDS, Bus LVDS, CML, or LVPECL compatible."+ },+ {+ "number": "31",+ "name": "SOB_0-",+ "type": "output",+ "description": "Switch B-side channel 0 inverting LVDS differential output, LVDS compatible (point-to-point use only, not multidrop BLVDS)."+ },+ {+ "number": "32",+ "name": "SOB_0+",+ "type": "output",+ "description": "Switch B-side channel 0 non-inverting LVDS differential output, LVDS compatible (point-to-point use only, not multidrop BLVDS)."+ },+ {+ "number": "33",+ "name": "SOA_0-",+ "type": "output",+ "description": "Switch A-side channel 0 inverting LVDS differential output, LVDS compatible (point-to-point use only, not multidrop BLVDS)."+ },+ {+ "number": "34",+ "name": "SOA_0+",+ "type": "output",+ "description": "Switch A-side channel 0 non-inverting LVDS differential output, LVDS compatible (point-to-point use only, not multidrop BLVDS)."+ },+ {+ "number": "35",+ "name": "ENB_0",+ "type": "input",+ "description": "LVTTL output enable control for the Switch B-side channel 0 output driver; each B-side driver has its own enable pin."+ },+ {+ "number": "36",+ "name": "ENA_0",+ "type": "input",+ "description": "LVTTL output enable control for the Switch A-side channel 0 output driver; each A-side driver has its own enable pin."+ },+ {+ "number": "37",+ "name": "VDD",+ "type": "power_in",+ "description": "Power supply pin, VDD = 3.3V ±0.3V."+ },+ {+ "number": "38",+ "name": "MUX_S0",+ "type": "input",+ "description": "Mux select control input for channel 0, selects whether Switch-side A or B input is passed to the Line-side (LVTTL)."+ },+ {+ "number": "39",+ "name": "LI_0-",+ "type": "input",+ "description": "Line-side channel 0 inverting differential input, LVDS, Bus LVDS, CML, or LVPECL compatible, with on-chip 100 Ω input termination."+ },+ {+ "number": "40",+ "name": "LI_0+",+ "type": "input",+ "description": "Line-side channel 0 non-inverting differential input, LVDS, Bus LVDS, CML, or LVPECL compatible, with on-chip 100 Ω input termination."+ },+ {+ "number": "41",+ "name": "LO_0-",+ "type": "output",+ "description": "Line-side channel 0 inverting LVDS differential output, LVDS compatible."+ },+ {+ "number": "42",+ "name": "LO_0+",+ "type": "output",+ "description": "Line-side channel 0 non-inverting LVDS differential output, LVDS compatible."+ },+ {+ "number": "43",+ "name": "VDD",+ "type": "power_in",+ "description": "Power supply pin, VDD = 3.3V ±0.3V."+ },+ {+ "number": "44",+ "name": "N/C",+ "type": "unconnected",+ "description": "No connect pin, listed as N/C in the pin description table."+ },+ {+ "number": "45",+ "name": "ENL_0",+ "type": "input",+ "description": "LVTTL output enable control for the Line-side channel 0 output driver; each Line-side output driver has its own enable pin."+ },+ {+ "number": "46",+ "name": "GND",+ "type": "power_in",+ "description": "Ground reference for LVDS and CMOS circuitry."+ },+ {+ "number": "47",+ "name": "GND",+ "type": "power_in",+ "description": "Ground reference for LVDS and CMOS circuitry."+ },+ {+ "number": "48",+ "name": "VDD",+ "type": "power_in",+ "description": "Power supply pin, VDD = 3.3V ±0.3V."+ },+ {+ "number": "49",+ "name": "DAP",+ "type": "passive",+ "description": "Exposed pad (from the footprint; not named in the datasheet pin table)."+ }+ ],+ "provenance": {+ "extractor": "extract_pins 0.3",+ "factory_chain": {+ "factory": "2.0.0",+ "extractor": "extract_pins 0.3",+ "primary_model": "claude-haiku-5-5",+ "primary_mode": "text",+ "consensus_model": "claude-sonnet-5-5",+ "consensus": "agreed",+ "guards": "pin_guards 0.1: passed",+ "guard_notes": [+ "extractor flagged: The exposed thermal pad is not given a numeric pin number in the pin table; it is labeled DAP (GND) ; These pins are listed only as 'No Connect' (N/C) with no further detail; typed as unconnected.; The package hint says 7x7.3, but the datasheet package drawing (RHS0048A) gives a 7.15/6.85 mm body ",+ "exposed pad 49 added from the footprint",+ "dropped thermal pad ['EP'] absent from footprint"+ ],+ "pages_sent": 16,+ "cost_usd": 0.1145,+ "at": "2026-10-08T16:05:47"+ },+ "datasheet": {+ "url": "https://www.ti.com/cn/lit/gpn/ds08mb200",+ "pages": 16,+ "sha256": "d7c79c9325619d86",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 49,+ "described": 49,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ },+ "models_3d": [+ {+ "file": "ds08mb200tsqx.step",+ "role": "plain",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 7,+ 7,+ 0.77+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "f2b38b0b4bf967c77e683e8d4599608b9f0503055ec535b93c4ebb5d0163e916",+ "checked": "2026-10-08",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ },+ {+ "file": "ds08mb200tsqx-etched.step",+ "role": "eda",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 7,+ 7,+ 0.77+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "73d553c4e25e622c61ce56c6fdd7f78f64029634c53663320f4cc735b7a6fb45",+ "checked": "2026-10-08",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ }+ ]+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}