component

DRV8899QWRGERQ1

Public Made by Adom

by adom

Texas Instruments Stepper Motor Driver, VQFN-24-EP(4x4). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentmotor driver icsdrv8899qwrgerq1factory-2.0.0extractor-text
Overview Files Discover Packages Releases Dependencies Issues Breadcrumbs Pull Requests Activity
main
Download ZIP Propose a change
Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs drv8899qwrgerq1: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 3d ago
viewers drv8899qwrgerq1: viewers · Ray 4d ago
drv8899qwrgerq1-etched.fit.json drv8899qwrgerq1: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 3d ago
drv8899qwrgerq1-etched.glb drv8899qwrgerq1: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 3d ago
drv8899qwrgerq1-etched.step drv8899qwrgerq1: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 3d ago
drv8899qwrgerq1.glb Publish 0.1.0 · Ray 4d ago
drv8899qwrgerq1.kicad_mod Publish 0.1.0 · Ray 4d ago
drv8899qwrgerq1.kicad_sym Publish 0.1.0 · Ray 4d ago
drv8899qwrgerq1.lbr Publish 0.1.0 · Ray 4d ago
drv8899qwrgerq1.step Publish 0.1.0 · Ray 4d ago
package.json Publish 0.1.0 · Ray 4d ago
page.json Set visibility: public · Ray 4d ago
README.md Initial commit: component/drv8899qwrgerq1 · Ray 4d ago

DRV8899QWRGERQ1

Texas Instruments · Stepper Motor Driver · VQFN-24-EP(4x4)

DRV8899QWRGERQ1 from Texas Instruments, in a VQFN-24-EP(4x4). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VM power_in Motor supply voltage input, 4.5V to 45V range with bypass capacitors to system ground.
2 PGND power_in Power supply ground, internally shorted to pin 7, connect to system ground.
3 AOUT1 output Motor winding A output 1, 1.7A peak current rating, drive stepper motor coil.
4 AOUT2 output Motor winding A output 2, 1.7A peak current rating, drive stepper motor coil.
5 BOUT2 output Motor winding B output 2, 1.7A peak current rating, drive stepper motor coil.
6 BOUT1 output Motor winding B output 1, 1.7A peak current rating, drive stepper motor coil.
7 PGND power_in Power supply ground, internally shorted to pin 2, connect to system ground.
8 VM power_in Motor supply voltage input, 4.5V to 45V range with bypass capacitors to system ground.
9 GND power_in Device signal ground, 0V reference, connect to system ground plane.
10 DVDD power_in Logic supply voltage nominally 5V from internal LDO, maximum 2mA load, bypass with 0.47µF-1µF X7R capacitor.
11 nFAULT tri_state Fault indicator open-drain output, pulled low on fault condition with maximum 10mA sinking current, requires external pull-up.
12 VREF power_in Current reference input voltage, 0.05V to 2.2V maximum for setting full-scale current regulation.
13 nSCS input Serial chip select input, low level active for SPI interface control with internal pull-up to DVDD.
14 VSDO power_in SDO output supply voltage pin, 2.9V to 5.5V range, connect to 5V or 3.3V per logic level requirement.
15 SDO output Serial data output push-pull, 16-bit word shifted on SCLK rising edge with 30-75Ω output impedance.
16 SDI input Serial data input, 16-bit format data captured on SCLK falling edge during SPI transactions.
17 SCLK input Serial clock input for SPI synchronization, data captured and shifted on clock edges.
18 STEP input Step input, rising edge advances internal indexer one step, 0-100kHz operating frequency, internal pull-down.
19 DIR input Direction input, logic level sets step direction clockwise or counter-clockwise, internal pull-down resistor.
20 DRVOFF input Drive output disable input, logic high disables all outputs, logic low enables motor drive, internal pull-up to DVDD.
21 nSLEEP input Sleep mode input, logic high enables device operation, logic low enters low-power mode with 2µA typical quiescent current.
22 CPL passive Charge pump negative switch node, connect 0.022µF X7R capacitor rated to VM between CPL and CPH.
23 CPH passive Charge pump positive switch node, connect 0.022µF X7R capacitor rated to VM between CPH and CPL.
24 VCP passive Charge pump output voltage typically VM+5V, connect 0.22µF 16V X7R capacitor between VCP and VM.
25 PAD passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package VQFN-24-EP(4x4)
Category Motor Driver ICs
Pins 25

CAD (KiCad official)

  • Symbol: DRV8899QWRGERQ1
  • Footprint: Package_DFN_QFN:QFN-24-1EP_4x4mm_P0.5mm_EP2.6x2.6mm
  • 3D model: VQFN-24-EP(4x4) (KiCad packages3D, STEP)
  • 3D model files: drv8899qwrgerq1-etched.step / drv8899qwrgerq1-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); drv8899qwrgerq1.step / drv8899qwrgerq1.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (72 pp, sha256 956eec06f4ac7215, retrieved 2026-10-01, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF