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DRV8871DDARQ1

Texas Instruments · Motor Driver ICs · SOIC-8-EP

DRV8871DDARQ1 from Texas Instruments, in a SOIC-8-EP. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 GND power_in Logic ground; connect to board ground.
2 IN2 input Logic input controlling the H-bridge outputs, with an internal 100 kΩ pulldown to GND and a logic input voltage range of 0 V to 5.5 V.
3 IN1 input Logic input controlling the H-bridge outputs, with an internal 100 kΩ pulldown to GND and a logic input voltage range of 0 V to 5.5 V.
4 ILIM input Current limit control; connect a resistor to ground to set the current chopping threshold, with a minimum allowed RILIM of 15 kΩ.
5 VM power_in Power supply input of 6.8 V to 45 V; connect a 0.1 µF bypass capacitor to ground plus sufficient bulk capacitance rated for the VM voltage.
6 OUT1 output H-bridge output; connect directly to the motor or other inductive load.
7 PGND power_in High-current ground path; connect to board ground.
8 OUT2 output H-bridge output; connect directly to the motor or other inductive load.
9 PAD passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOIC-8-EP
Category Power Management (PMIC)
Pins 9

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
VM Power supply voltage VM 6.8 45 V 4
Logic input voltage (IN1, IN2) VI 0 5.5 V 4
Logic input PWM frequency (IN1, IN2) fPWM 0 200 kHz 4
Peak output current Ipeak 0 3.6 A 4
Operating ambient temperature TA -40 125 °C 4
Power supply voltage (VM) VM -0.3 50 V 3
Logic input voltage (IN1, IN2) -0.3 7 V 3
Continuous phase node pin voltage (OUT1, OUT2) -0.7 V max printed as VM + 0.7 V 3
Current sense input pin voltage (ISEN) ISEN -0.5 1 V 3
Output current (100% duty cycle) 0 3.5 A 3
Operating junction temperature TJ -40 150 °C 3
Storage temperature Tstg -65 150 °C 3
VM operating voltage VM 6.8 45 V 5
VM operating supply current IVM 3 10 mA 5
Input logic-low current IIL -1 1 μA VIN = 0 V 5
Input logic-high current IIH 33 100 μA VIN = 3.3 V 5
Propagation delay tPD 0.7 1 μs INx to OUTx change 5
Time to sleep tsleep 1 1.5 ms Inputs low to sleep 5
High-side FET on resistance RDS(ON) 307 610 mΩ VM = 24 V, I = 1 A, fPWM = 25 kHz 5
Low-side FET on resistance RDS(ON) 258 500 mΩ VM = 24 V, I = 1 A, fPWM = 25 kHz 5
Body diode forward voltage Vd 0.8 1 V IOUT = 1 A 5
Constant for calculating current regulation VILIM 59 64 69 kV VM = 24 V, IOUT = 1 A 5
VM undervoltage lockout (VM falling) VUVLO 6.3 6.5 V VM falls until UVLO triggers 5
VM undervoltage lockout (VM rising) VUVLO 6.4 6.7 V VM rises until operation recovers 5
Overcurrent protection trip level IOCP 3.7 4.5 6.6 A 5
Thermal shutdown temperature TSD 155 180 °C 5
Input logic-low voltage VIL 0.5 V 5
Input logic-high voltage VIH 1.6 V 5
Turnon time tON 40 50 µs VM > VUVLO with IN1 or IN2 high 5
VM sleep current IVMSLEEP 13 µA VM = 12 V 5
Input logic hysteresis VHYS 0.5 V 5
Pulldown resistance RPD 100 kΩ To GND 5
Output dead time tDEAD 250 ns 5
VM undervoltage hysteresis VUV,HYS 180 mV Rising to falling threshold 5
PWM off-time tOFF 25 µs 5
PWM blanking time tBLANK 2 µs 5
Overcurrent deglitch time tOCP 2 µs 5
Overcurrent retry time tRETRY 3 ms 5
Thermal shutdown hysteresis THYS 40 °C 5
Junction-to-ambient thermal resistance (DDA HSOP) RθJA 41.7 °C/W 4
Junction-to-case (top) thermal resistance (DDA HSOP) RθJC(top) 53.7 °C/W 4
Junction-to-board thermal resistance (DDA HSOP) RθJB 12.4 °C/W 4
Junction-to-top characterization parameter (DDA HSOP) ψJT 3 °C/W 4
Junction-to-board characterization parameter (DDA HSOP) ψJB 12.6 °C/W 4
Junction-to-case (bottom) thermal resistance (DDA HSOP) RθJC(bot) 2.6 °C/W 4

CAD (KiCad official)

  • Symbol: DRV8871DDARQ1
  • Footprint: Package_SO:SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.29x3mm
  • 3D model: SOIC-8-EP (KiCad packages3D, STEP)
  • 3D model files: drv8871ddarq1-etched.step / drv8871ddarq1-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); drv8871ddarq1.step / drv8871ddarq1.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (24 pp, sha256 7fc03dc7c79e6cc5, retrieved 2026-10-17, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF