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DRV8845RHHR

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Texas Instruments Stepper Motor Driver, VQFN-36(6x6). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentmotor driver icsdrv8845rhhrfactory-2.0.0extractor-text

Verified DRV8845RHHR

by Ray · last 10 Nov 2026 · 1 record · files match
SymbolFootprint3D modelPins

Verification log 1 record

10 Nov 2026RayPublished by the parts factory: tier mfr, 37 pinsfiles match
SymbolFootprint3D modelPinsfor all variants
  • ✓component-page-verify: PASS
  • ✓cad_props: Datasheet, MPN and distributor properties match page.json
  • ✓component: DRV8845RHHR · VQFN-36(6x6) · 37 pins
  • ✓copper: 37 copper pads, none touching another net
  • ✓datasheet: all 37 pin names found in the 35-page datasheet
  • ✓distributor: lcsc C20345375, digikey 296-DRV8845RHHRTR-ND, mouser 595-DRV8845RHHR
  • ✓family: QFN-36-1EP_6x6mm_P0.5mm_EP3.7x3.7mm
  • ✓files: 7 declared files present
  • ✓hero: docs/hero.png 4000x2500
  • ✓lbr: OK: /tmp/cpv-412_ga93/x.lbr is a valid EAGLE .lbr with complete deviceset
  • ✓license: CC-BY-SA-4.0
  • ✓models_3d: 2 records
  • ✓package_fit: height within the datasheet's package drawing (datasheet p.32)
  • ✓pads: 37 pins = 37 pads
  • ✓pose: 2 STEP(s) Z-up, seated, centred
  • ✓symbol: 37 pins agree
  • ✓symbol_text: no pin names collide
  • ✓viewers: viewers/footprint.html 43 kB, viewers/symbol.html 26 kB
  • ✓visibility: public, source open
Evidencedatasheet
Verified files✓ drv8845rhhr.kicad_sym✓ drv8845rhhr.kicad_mod✓ drv8845rhhr.step
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Generated by kicad-footprint-generator · KiCad file format 20260206
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docs Publish 0.1.0 · Ray
viewers drv8845rhhr: viewers rendered from the public page · Ray
drv8845rhhr-etched.glb Publish 0.1.0 · Ray
drv8845rhhr-etched.step drv8845rhhr: factory component page (tier=mfr) · Ray
drv8845rhhr-hero.glb drv8845rhhr: hero GLB from the etched model (keeps the MPN mark) · Ray
drv8845rhhr-hero.overlay.json Publish 0.1.0 · Ray
drv8845rhhr.glb Publish 0.1.0 · Ray
drv8845rhhr.kicad_mod Publish 0.1.0 · Ray
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drv8845rhhr.lbr Publish 0.1.0 · Ray
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package.json Publish 0.1.0 · Ray
page.json Set visibility: public · Ray
README.md Publish 0.1.0 · Ray
verification.json Verified: Published by the parts factory: tier mfr, 37 pins · Ray

DRV8845RHHR

Texas Instruments · Stepper Motor Driver · VQFN-36(6x6)

DRV8845RHHR from Texas Instruments, in a VQFN-36(6x6). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 I04 input Control input for H-Bridge 4; logic input with a 0 V to 5.5 V recommended control input range, and it must be left OPEN when H-Bridges 3 and 4 are paralleled.
2 OUT1A output H-Bridge 1 output A; continuous phase node voltage is limited to -1 V to VVM + 1 V and output current to 1.5 A.
3 SENSE1 output Sense resistor terminal for H-Bridge 1; the SENSE1 pin voltage must stay within ±500 mV.
4 OUT1B output H-Bridge 1 output B; continuous phase node voltage is limited to -1 V to VVM + 1 V and output current to 1.5 A.
5 VM1 power_in Supply voltage pin with a 4.5 V to 38 V recommended operating range; it should be connected to the VM2 pin close to the device.
6 OUT2B output H-Bridge 2 output B; continuous phase node voltage is limited to -1 V to VVM + 1 V and output current to 1.5 A.
7 SENSE2 output Sense resistor terminal for H-Bridge 2; the SENSE2 pin voltage must stay within ±500 mV.
8 OUT2A output H-Bridge 2 output A; continuous phase node voltage is limited to -1 V to VVM + 1 V and output current to 1.5 A.
9 PHASE4 input Control input for H-Bridge 4 that sets the output current direction; leave OPEN when H-Bridges 3 and 4 are paralleled.
10 PHASE3 input Control input for H-Bridge 3; when H-Bridges 3 and 4 are paralleled, it controls the combined H-bridge.
11 nSLEEP input Sleep mode input; logic high enables the device and logic low enters low-power sleep mode, with an internal pulldown resistor and a -0.3 V to 5.75 V absolute maximum rating.
12 VREF1 input Reference voltage input that sets the full-scale chopping current in H-Bridge 1; 0 V to 1.5 V recommended.
13 VREF2 input Reference voltage input that sets the full-scale chopping current in H-Bridge 2; 0 V to 1.5 V recommended.
14 VREF3 input Reference voltage input that sets the full-scale chopping current in H-Bridge 3; it alone controls the combined bridge current when H-Bridges 3 and 4 are paralleled.
15 VREF4 input Reference voltage input that sets the full-scale chopping current in H-Bridge 4; it is ignored when H-Bridges 3 and 4 are paralleled and should be left OPEN in that case.
16 GND power_in Analog ground; all device voltages are referenced with respect to this pin.
17 PHASE2 input Control input for H-Bridge 2 that sets the output current direction.
18 PHASE1 input Control input for H-Bridge 1 that sets the output current direction.
19 I14 input Control input for H-Bridge 4; leave OPEN when H-Bridges 3 and 4 are paralleled.
20 OUT4A output H-Bridge 4 output A; continuous phase node voltage is limited to -1 V to VVM + 1 V and output current to 1.5 A.
21 SENSE4 output Sense resistor terminal for H-Bridge 4; the SENSE4 pin voltage must stay within ±500 mV.
22 OUT4B output H-Bridge 4 output B; continuous phase node voltage is limited to -1 V to VVM + 1 V and output current to 1.5 A.
23 VM2 power_in Supply voltage pin with a 4.5 V to 38 V recommended operating range; it should be connected to the VM1 pin close to the device.
24 OUT3B output H-Bridge 3 output B; continuous phase node voltage is limited to -1 V to VVM + 1 V and output current to 1.5 A.
25 SENSE3 output Sense resistor terminal for H-Bridge 3; the SENSE3 pin voltage must stay within ±500 mV.
26 OUT3A output H-Bridge 3 output A; continuous phase node voltage is limited to -1 V to VVM + 1 V and output current to 1.5 A.
27 I13 input Control input for H-Bridge 3; when H-Bridges 3 and 4 are paralleled, it controls the combined H-bridge.
28 I12 input Control input for H-Bridge 2 (logic input, 0 V to 5.5 V recommended).
29 I11 input Control input for H-Bridge 1 (logic input, 0 V to 5.5 V recommended).
30 PGND power_in Power ground for the device.
31 VCP power_out Charge pump reservoir capacitor terminal; the VCP operating voltage is VVM + 5 V when VVM is above 6 V.
32 CP1 passive Charge pump capacitor terminal; a ceramic flying capacitor is connected between CP1 and CP2.
33 CP2 passive Charge pump capacitor terminal and negative switching pin; absolute maximum voltage is -0.3 V to VVM.
34 I01 input Control input for H-Bridge 1 (logic input, 0 V to 5.5 V recommended).
35 I02 input Control input for H-Bridge 2 (logic input, 0 V to 5.5 V recommended).
36 I03 input Control input for H-Bridge 3; when H-Bridges 3 and 4 are paralleled, it controls the combined H-bridge.
37 PAD passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package VQFN-36(6x6)
Category Motor Driver ICs
Pins 37

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Power supply voltage (VMx) -0.3 40 V 6
Charge pump voltage (VCP, CP1); max printed as VVM + 7 -0.3 V 6
Charge pump negative switching pin (CP2); max printed as VVM -0.3 V 6
Sleep mode input voltage (nSLEEP) -0.3 5.75 V 6
Control input voltage -0.3 5.75 V 6
SENSEx pin voltage (VSENSEx) VSENSEx -0.5 0.5 V 6
SENSEx pin voltage (VSENSEx) for < 1 us VSENSEx -2.5 2.5 V for < 1 μs 6
Reference input pin voltage (VREFx) VREFx -0.3 5.75 V 6
Continuous phase node pin voltage (OUTxA, OUTxB); max printed as VVM + 1 -1 V Continuous 6
Transient 100 ns phase node pin voltage (OUTxA, OUTxB); max printed as VVM + 3 -3 V 100 ns transient 6
Output current 0 1.5 A 6
Operating ambient temperature TA -40 125 °C 6
Operating junction temperature TJ -40 150 °C 6
Storage temperature Tstg -65 150 °C 6
Supply voltage range for normal (DC) operation VVM 4.5 38 V 6
Control input voltage VI 0 5.5 V 6
Reference voltage (VREFx) VREFx 0 1.5 V 6
Operating ambient temperature TA -40 125 °C 6
Operating junction temperature TJ -40 150 °C 6
VM operating supply current, outputs on IVM 9 14 mA nSLEEP = 1, IOUT = 0 mA, outputs on, PWM = 50 kHz, DC = 50% 7
VM operating supply current, outputs off IVM 3.5 4.5 mA nSLEEP = 1, Outputs off 7
VM sleep supply current IVM 1.3 3 μA nSLEEP = 0 7
nSLEEP reset pulse tRESET 20 40 μs nSLEEP low to clear fault 7
Wake-up time tWAKE 0.62 0.8 ms nSLEEP = 1 to output transition 7
Turn-on time tON 0.62 0.8 ms VM > UVLO to output transition 7
Input logic-low voltage VIL 0 0.8 V 7
Input logic-high voltage VIH 2 5.5 V 7
Input logic hysteresis VHYS 140 270 400 mV 7
Logic input low current IINL -1 1 μA VIN = 0 V 7
Propagation delay, PWM change to source on tPD 300 600 900 ns PWM change to source on 7
Propagation delay, PWM change to source off tPD 150 700 ns PWM change to source off 7
Propagation delay, PWM change to sink on tPD 300 600 900 ns PWM change to sink on 7
Propagation delay, PWM change to sink off tPD 150 700 ns PWM change to sink off 7
High-side FET on resistance RDS(ONH) 450 550 mΩ TJ = 25 °C, IO = -1.2 A 7
High-side FET on resistance RDS(ONH) 700 850 mΩ TJ = 125 °C, IO = -1.2 A 7
High-side FET on resistance RDS(ONH) 780 950 mΩ TJ = 150 °C, IO = -1.2 A 7
Low-side FET on resistance RDS(ONL) 450 550 mΩ TJ = 25 °C, IO = 1.2 A 7
Low-side FET on resistance RDS(ONL) 700 850 mΩ TJ = 125 °C, IO = 1.2 A 7
Low-side FET on resistance RDS(ONL) 780 950 mΩ TJ = 150 °C, IO = 1.2 A 7
Output leakage IDSS -2 7 μA Outputs, VOUT = 0 to VM 7
Dead time tD 90 425 600 ns 8
VREFx pin reference input current IVREFx -1 1 μA VREF = 1.5 V 8
Current trip accuracy, phase current = 100% ΔITRIP -2 2 % VVREFx = 1.5 V, phase current = 100% 8
Current trip accuracy, phase current = 67% ΔITRIP -3 3 % VVREFx = 1.5 V, phase current = 67% 8
Current trip accuracy, phase current = 33% ΔITRIP -7 7 % VVREFx = 1.5 V, phase current = 33% 8
VM UVLO threshold, falling VMUVLO 4.1 4.25 4.35 V VM falling 8
VM UVLO threshold, rising VMUVLO 4.2 4.34 4.45 V VM rising 8
Thermal shutdown TOTSD 155 165 175 °C Die temperature TJ 8
Junction-to-ambient thermal resistance RθJA 29.9 °C/W 6
Junction-to-case (top) thermal resistance RθJC(top) 19.5 °C/W 6
Junction-to-board thermal resistance RθJB 11.6 °C/W 6
Junction-to-case (bottom) thermal resistance RθJC(bot) 4.1 °C/W 7
Sleep time tSLEEP 120 μs nSLEEP = 0 to sleep mode 7
Charge pump switching frequency f(VCP) 380 kHz VVM > UVLO, nSLEEP = 1 7
Logic input high current IINH 30 μA VIN = 5 V 7
Body diode forward voltage Vf 1.2 V IO = ± 1.2 A 7
Overcurrent deglitch time tOCP 2.1 μs 8
Overcurrent protection IOCP 2.5 A Current through any FET 8
Thermal shutdown hysteresis THYS_OTSD 20 °C Die temperature TJ 8
VM UVLO hysteresis VMUVLO,HYS 90 mV Rising to falling threshold 8

CAD (KiCad official)

  • Symbol: DRV8845RHHR
  • Footprint: Package_DFN_QFN:QFN-36-1EP_6x6mm_P0.5mm_EP3.7x3.7mm
  • 3D model: VQFN-36(6x6) (KiCad packages3D, STEP)
  • 3D model files: drv8845rhhr-etched.step / drv8845rhhr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); drv8845rhhr.step / drv8845rhhr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (35 pp, sha256 29a595b6de77a2c7, retrieved 2026-11-10, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF