component
DRV8833CRTER
Public Made by Adomby adom
Texas Instruments Motor Driver ICs, WQFN-16-EP(3x3). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownDRV8833CRTER
Texas Instruments · Motor Driver ICs · WQFN-16-EP(3x3)
DRV8833CRTER from Texas Instruments, in a WQFN-16-EP(3x3). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | AISEN | passive | Bridge A sense pin; a sense resistor to GND sets the PWM current regulation level (VTRIP 200 mV nominal), or connect directly to ground to disable current control. |
| 2 | AOUT2 | output | Bridge A output 2; positive current is AOUT1 to AOUT2. |
| 3 | BOUT2 | output | Bridge B output 2; positive current is BOUT1 to BOUT2. |
| 4 | BISEN | passive | Bridge B sense pin; a sense resistor to GND sets the PWM current regulation level (VTRIP 200 mV nominal), or connect directly to ground to disable current control. |
| 5 | BOUT1 | output | Bridge B output 1; positive current is BOUT1 to BOUT2. |
| 6 | nFAULT | output | Open-drain fault indication pulled logic low on a fault condition; requires an external pullup (>1 kΩ, to a supply rated <5.5 V). |
| 7 | BIN1 | input | H-bridge B PWM input controlling the state of BOUT1 and BOUT2; internal pulldown (150 kΩ typ). |
| 8 | BIN2 | input | H-bridge B PWM input controlling the state of BOUT1 and BOUT2; internal pulldown (150 kΩ typ). |
| 9 | NC | unconnected | No connect pin. |
| 10 | VM | power_in | Motor power supply, 2.7 to 10.8 V; bypass to GND with a 10-µF ceramic capacitor rated for VM. |
| 11 | GND | power_in | Device ground; both the GND pin and the PowerPAD must be connected to ground. |
| 12 | VINT | power_out | Internal 3.3 V regulator output; bypass to GND with a 2.2-µF, 6.3-V ceramic capacitor. |
| 13 | AIN2 | input | H-bridge A PWM input controlling the state of AOUT1 and AOUT2; internal pulldown (150 kΩ typ). |
| 14 | AIN1 | input | H-bridge A PWM input controlling the state of AOUT1 and AOUT2; internal pulldown (150 kΩ typ). |
| 15 | nSLEEP | input | Sleep mode input: logic high enables the device, logic low enters low-power sleep mode; internal 500-kΩ pulldown, clamped at 6.5 V. |
| 16 | AOUT1 | output | Bridge A output 1; positive current is AOUT1 to AOUT2. |
| 17 | GND | power_in | Exposed thermal pad (PowerPAD); must be connected to ground and soldered to the board for thermal performance. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | WQFN-16-EP(3x3) |
| Category | Power Supply Chip |
| Pins | 17 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| VM operating voltage | VM | 2.7 | 10.8 | V | 5 | ||
| VM operating supply current | IVM | 1.7 | 3 | mA | VM = 5 V, xINx low, nSLEEP high | 5 | |
| VM sleep mode supply current | IVMQ | 1.6 | 2.7 | μA | VM = 5 V, nSLEEP low | 5 | |
| Internal regulator voltage | VINT | 3 | 3.3 | 3.6 | V | VM = 5 V | 5 |
| Input logic low voltage xINx | VIL | 0 | 0.7 | V | xINx | 5 | |
| Input logic low voltage nSLEEP | VIL | 0 | 0.5 | V | nSLEEP | 5 | |
| Input logic high voltage xINx | VIH | 2 | 5.5 | V | xINx | 5 | |
| Input logic high voltage nSLEEP | VIH | 2.5 | 5.5 | V | nSLEEP | 5 | |
| Input logic hysteresis | VHYS | 350 | 400 | 650 | mV | 5 | |
| Input logic low current | IIL | -1 | 1 | μA | VIN = 0 V | 5 | |
| Input logic high current | IIH | 50 | μA | VIN = 5 V | 5 | ||
| Pulldown resistance xINx | RPD | 100 | 150 | 250 | kΩ | xINx | 5 |
| Pulldown resistance nSLEEP | RPD | 380 | 500 | 750 | kΩ | nSLEEP | 5 |
| Output logic low voltage | VOL | 0.5 | V | IO = 5 mA | 5 | ||
| Output logic high leakage | IOH | -1 | 1 | μA | RPULLUP = 1 kΩ to 5 V | 5 | |
| High-side FET on-resistance | RDS(ON) | 1400 | 1475 | mΩ | VM = 5 V, I = 0.2 A, TA = 85°C | 5 | |
| High-side FET on-resistance | RDS(ON) | 1875 | 1975 | mΩ | VM = 2.7 V, I = 0.2 A, TA = 85°C | 5 | |
| Low-side FET on-resistance | RDS(ON) | 675 | 705 | mΩ | VM = 5 V, I = 0.2 A, TA = 85°C | 5 | |
| Low-side FET on-resistance | RDS(ON) | 775 | 815 | mΩ | VM = 2.7 V, I = 0.2 A, TA = 85°C | 5 | |
| Off-state leakage current | IOFF | -1 | 1 | μA | VM = 5 V | 6 | |
| xISEN trip voltage | VTRIP | 160 | 200 | 240 | mV | 6 | |
| Power supply (VM) | VM | -0.3 | 11.8 | V | 4 | ||
| Internal regulator (VINT) | VINT | -0.3 | 3.8 | V | 4 | ||
| Control pins voltage | -0.3 | 7 | V | AIN1, AIN2, BIN1, BIN2, nSLEEP, nFAULT | 4 | ||
| Continuous phase node pins voltage | -0.3 | 0.5 | V | AOUT1, AOUT2, BOUT1, BOUT2; max is VM + 0.5 V | 4 | ||
| Pulsed 10 µs phase node pins voltage | -1 | 1 | V | AOUT1, AOUT2, BOUT1, BOUT2; max is VM + 1 V | 4 | ||
| Continuous shunt amplifier input pins | -0.3 | 0.5 | V | AISEN, BISEN | 4 | ||
| Pulsed 10 µs shunt amplifier input pins | -1 | 1 | V | AISEN, BISEN | 4 | ||
| Operating junction temperature | TJ | -40 | 150 | °C | 4 | ||
| Storage temperature range | Tstg | -65 | 150 | °C | 4 | ||
| ESD HBM | V(ESD) | -2000 | 2000 | V | HBM, all pins | 4 | |
| ESD CDM | V(ESD) | -1000 | 1000 | V | CDM, all pins | 4 | |
| Power supply voltage range | VM | 2.7 | 10.8 | V | 4 | ||
| Logic level input voltage | VI | 0 | 5.5 | V | 4 | ||
| Motor RMS current | IRMS | 0 | 0.6 | A | RTE package | 4 | |
| Applied PWM frequency | ƒPWM | 0 | 200 | kHz | Applied PWM signal to AIN1, AIN2, BIN1, or BIN2 | 4 | |
| Operating ambient temperature | TA | -40 | 85 | °C | 4 | ||
| Junction-to-ambient thermal resistance | RθJA | 44.7 | °C/W | QFN 16 pins | 5 | ||
| Junction-to-case (top) thermal resistance | RθJC(top) | 48.5 | °C/W | QFN 16 pins | 5 | ||
| Junction-to-board thermal resistance | RθJB | 16.8 | °C/W | QFN 16 pins | 5 | ||
| Junction-to-top characterization parameter | ψJT | 0.7 | °C/W | QFN 16 pins | 5 | ||
| Junction-to-board characterization parameter | ψJB | 16.7 | °C/W | QFN 16 pins | 5 | ||
| Junction-to-case (bottom) thermal resistance | RθJC(bot) | 4.2 | °C/W | QFN 16 pins | 5 | ||
| High-side FET on-resistance | RDS(ON) | 1180 | mΩ | VM = 5 V, I = 0.2 A, TA = 25°C | 5 | ||
| High-side FET on-resistance | RDS(ON) | 1550 | mΩ | VM = 2.7 V, I = 0.2 A, TA = 25°C | 5 | ||
| Low-side FET on-resistance | RDS(ON) | 555 | mΩ | VM = 5 V, I = 0.2 A, TA = 25°C | 5 | ||
| Low-side FET on-resistance | RDS(ON) | 635 | mΩ | VM = 2.7 V, I = 0.2 A, TA = 25°C | 5 | ||
| Sleep time | tSLEEP | 10 | µs | nSLEEP low to sleep mode | 5 | ||
| Wake-up time | tWAKE | 155 | μs | nSLEEP high to output transition | 5 | ||
| Turn-on time | tON | 25 | μs | VM > VUVLO to output transition | 5 | ||
| VM undervoltage lockout falling | VUVLO | 2.6 | V | VM falling; UVLO report | 6 | ||
| VM undervoltage lockout rising | VUVLO | 2.7 | V | VM rising; UVLO recovery | 6 | ||
| Overcurrent protection trip level | IOCP | 1 | A | 6 | |||
| Thermal shutdown temperature | TTSD | 150 | °C | Die temperature, TJ | 6 |
CAD (KiCad official)
- Symbol:
DRV8833CRTER - Footprint:
Package_DFN_QFN:QFN-16-1EP_3x3mm_P0.5mm_EP1.7x1.7mm - 3D model: WQFN-16-EP(3x3) (KiCad packages3D, STEP)
- 3D model files:
drv8833crter-etched.step/drv8833crter-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);drv8833crter.step/drv8833crter.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (30 pp, sha256
6283eae3c9c8f282, retrieved 2026-10-31, tier: manufacturer) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).