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DRV8812RHDR

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Texas Instruments Stepper Motor Driver, VQFN-28-EP(5x5). Pinout reviewed by a person against the datasheet, KiCad symbol/footprint/3D.

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DRV8812RHDR

Texas Instruments · Stepper Motor Driver · VQFN-28-EP(5x5)

DRV8812RHDR from Texas Instruments, in a VQFN-28-EP(5x5). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 BI0 input Bridge B current selection LSB (BI1:BI0 = 00 for 100%, 01 for 71%, 10 for 38%, 11 for 0% full-scale chopping current)
2 BI1 input Bridge B current selection MSB (completes BI1:BI0 current control function)
3 GND power_in Device ground
4 CP1 bidirectional Charge pump flying capacitor node 1 (connect 0.01-µF 50-V capacitor between CP1 and CP2)
5 CP2 bidirectional Charge pump flying capacitor node 2 (connect 0.01-µF 50-V capacitor between CP1 and CP2)
6 VCP bidirectional High-side gate drive voltage supply (connect 0.1-µF 16-V ceramic capacitor and 1-MΩ resistor to VM)
7 VMA power_in Bridge A motor supply voltage input (8.2-V to 45-V operating range, bypass with 0.1-µF capacitor to GND)
8 AOUT1 output Bridge A output 1 for motor winding connection
9 ISENA bidirectional Bridge A current sense return (connect current sense resistor to measure chopping current)
10 AOUT2 output Bridge A output 2 for motor winding connection
11 BOUT2 output Bridge B output 2 for motor winding connection
12 ISENB bidirectional Bridge B current sense return (connect current sense resistor to measure chopping current)
13 BOUT1 output Bridge B output 1 for motor winding connection
14 VMB power_in Bridge B motor supply voltage input (connect to same supply voltage as VMA with 0.1-µF bypass to GND)
15 AVREF input Bridge A reference voltage input for current regulation (1-3.5V with 0.01-µF bypass capacitor to GND recommended)
16 BVREF input Bridge B reference voltage input for current regulation (1-3.5V with 0.01-µF bypass capacitor to GND recommended)
17 GND power_in Device ground
18 V3P3OUT power_out 3.3-V regulated supply output (bypass with 0.47-µF 6.3-V ceramic capacitor to GND, can supply VREF pins)
19 nRESET input Active-low reset input (initializes internal logic and disables H-bridge outputs when held low)
20 nSLEEP input Sleep mode control input (logic high enables device, logic low enters low-power sleep mode)
21 nFAULT tri_state Fault condition open-drain output (pulls low during thermal shutdown or overcurrent protection event)
22 DECAY input Decay mode selection input (low = slow decay, open = mixed decay, high = fast decay for both bridges)
23 APHASE input Bridge A phase/direction control input (logic high sets AOUT1 high and AOUT2 low)
24 AENBL input Bridge A enable input (logic high enables bridge A, logic low disables with high-impedance outputs)
25 BENBL input Bridge B enable input (logic high enables bridge B, logic low disables with high-impedance outputs)
26 BPHASE input Bridge B phase/direction control input (logic high sets BOUT1 high and BOUT2 low)
27 AI0 input Bridge A current control LSB (AI1:AI0 = 00 for 100%, 01 for 71%, 10 for 38%, 11 for 0% full-scale chopping current)
28 AI1 input Bridge A current control MSB (completes AI1:AI0 current selection function)

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package VQFN-28-EP(5x5)
Category Motor Driver ICs
Pins 29

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
VMx Power supply voltage VMx -0.3 47 V 5
VMx Power supply ramp rate 1 V/µs 5
Digital pin voltage -0.5 7 V 5
VREF Input voltage VREF -0.3 4 V 5
ISENSEx pin voltage -0.8 0.8 V Transients of ±1 V for less than 25 ns acceptable (note 3) 5
Continuous motor drive output current 0 1.6 A Power dissipation and thermal limits must be observed (note 4) 5
Operating virtual junction temperature TJ -40 150 °C 5
Operating ambient temperature TA -40 85 °C 5
Storage temperature Tstg -60 150 °C 5
VM Motor power supply voltage range VM 8.2 45 V 5
VREF input voltage VREF 1 3.5 V 5
V3P3OUT load current IV3P3 1 mA 5
VM operating supply current IVM 5 8 mA VM = 24 V, fPWM < 50 kHz 6
VM sleep mode supply current IVMQ 10 20 μA VM = 24 V 6
VM undervoltage lockout voltage VUVLO 7.8 8.2 V VM rising 6
V3P3OUT voltage V3P3 3.18 3.3 3.42 V IOUT = 0 to 1 mA, VM = 24 V, TJ = 25°C 6
V3P3OUT voltage V3P3 3.1 3.3 3.5 V IOUT = 0 to 1 mA 6
Input low voltage VIL 0.6 0.7 V 6
Input high voltage VIH 2 5.25 V 6
Input low current IIL -20 20 μA VIN = 0 6
Input high current IIH 100 μA VIN = 3.3 V 6
Output low voltage (nFAULT) VOL 0.5 V IO = 5 mA 6
Output high leakage current (nFAULT) IOH 1 μA VO = 3.3 V 6
Input low threshold voltage (DECAY) VIL 0 0.8 V For slow decay mode 6
Input high threshold voltage (DECAY) VIH 2 V For fast decay mode 6
Input current (DECAY) IIN -40 40 µA 6
HS FET on resistance RDS(ON) 0.63 Ω VM = 24 V, IO = 1 A, TJ = 25°C 6
HS FET on resistance RDS(ON) 0.76 0.9 Ω VM = 24 V, IO = 1 A, TJ = 85°C 6
LS FET on resistance RDS(ON) 0.65 Ω VM = 24 V, IO = 1 A, TJ = 25°C 6
LS FET on resistance RDS(ON) 0.78 0.9 Ω VM = 24 V, IO = 1 A, TJ = 85°C 6
Off-state leakage current IOFF -20 20 μA 6
Rise time tR 100 360 ns VM = 24 V 6
Fall time tF 80 250 ns VM = 24 V 6
Input deglitch time tDEG 1.3 2.9 µs 6
Overcurrent protection trip level IOCP 1.8 5 A 6
Thermal shutdown temperature tTSD 150 160 180 °C Die temperature 6
xVREF input current IREF -3 3 μA xVREF = 3.3 V 6
xISENSE trip voltage VTRIP 635 660 685 mV xVREF = 3.3 V, 100% current setting 6
xISENSE trip voltage VTRIP 445 469 492 mV xVREF = 3.3 V, 71% current setting 6
xISENSE trip voltage VTRIP 225 251 276 mV xVREF = 3.3 V, 38% current setting 6
VHYS input hysteresis VHYS 0.45 V 6
Internal PWM frequency fPWM 50 kHz 6
Current sense blanking time tBLANK 3.75 μs 6
Dead time tDEAD 400 ns 6
Current sense amplifier gain AISENSE 5 V/V Reference only 6
Junction-to-ambient thermal resistance (VQFN, RHD) RθJA 35.8 °C/W RHD (VQFN) package column 5
Junction-to-case (top) thermal resistance (VQFN, RHD) RθJC(top) 25.1 °C/W RHD (VQFN) package column 5
Junction-to-board thermal resistance (VQFN, RHD) RθJB 8.2 °C/W RHD (VQFN) package column 5
Junction-to-top characterization parameter (VQFN, RHD) ψJT 0.3 °C/W RHD (VQFN) package column 5
Junction-to-board characterization parameter (VQFN, RHD) ψJB 8.2 °C/W RHD (VQFN) package column 5
Junction-to-case (bottom) thermal resistance (VQFN, RHD) RθJC(bot) 1.1 °C/W RHD (VQFN) package column 5

CAD (KiCad official)

  • Symbol: DRV8812RHDR
  • Footprint: Package_DFN_QFN:QFN-28-1EP_5x5mm_P0.5mm_EP3.35x3.35mm
  • 3D model: VQFN-28-EP(5x5) (KiCad packages3D, STEP)
  • 3D model files: drv8812rhdr-etched.step / drv8812rhdr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); drv8812rhdr.step / drv8812rhdr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (32 pp, sha256 e267ee0fecd31d5d, retrieved 2026-10-21, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF