component
DRV8800PWPR
Public Made by Adomby adom
Texas Instruments Brushed DC Motor Drivers, TSSOP-16-EP. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
← Commit history
drv8800pwpr: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding)
2 files changed
+96−16
package.json+54−14@@ -53,19 +53,19 @@ "number": "1", "name": "nFAULT", "type": "output",- "description": "Open-drain fault output, pulled low on motor fault, supply undervoltage, or junction temperature exceeding 160\u00b0C; requires external pullup resistor."+ "description": "Open-drain fault output, pulled low on motor fault, supply undervoltage, or junction temperature exceeding 160°C; requires external pullup resistor." }, { "number": "2", "name": "MODE", "type": "input",- "description": "Mode selection input. Logic high selects slow-decay mode, logic low selects fast-decay mode. Input threshold VIH \u2265 2V, VIL \u2264 0.8V."+ "description": "Mode selection input. Logic high selects slow-decay mode, logic low selects fast-decay mode. Input threshold VIH ≥ 2V, VIL ≤ 0.8V." }, { "number": "3", "name": "PHASE", "type": "input",- "description": "Phase/direction control input. Logic high = forward, logic low = reverse. Controls H-bridge direction. Input threshold VIH \u2265 2V, VIL \u2264 0.8V."+ "description": "Phase/direction control input. Logic high = forward, logic low = reverse. Controls H-bridge direction. Input threshold VIH ≥ 2V, VIL ≤ 0.8V." }, { "number": "4",@@ -77,49 +77,49 @@ "number": "5", "name": "nSLEEP", "type": "input",- "description": "Sleep mode enable input. Logic high enables device operation, logic low enters low-power sleep mode with <10\u00b5A quiescent current. Internal pulldown resistor. Input threshold VIH \u2265 2.7V, VIL \u2264 0.8V."+ "description": "Sleep mode enable input. Logic high enables device operation, logic low enters low-power sleep mode with <10µA quiescent current. Internal pulldown resistor. Input threshold VIH ≥ 2.7V, VIL ≤ 0.8V." }, { "number": "6", "name": "ENABLE", "type": "input",- "description": "Output enable control input. Logic high enables H-bridge, logic low disables output. Input threshold VIH \u2265 2V, VIL \u2264 0.8V."+ "description": "Output enable control input. Logic high enables H-bridge, logic low disables output. Input threshold VIH ≥ 2V, VIL ≤ 0.8V." }, { "number": "7", "name": "OUT+", "type": "output",- "description": "H-bridge positive output to motor. Rated for \u00b12.8A peak current, typical RDS(on) = 0.4\u03a9 at 25\u00b0C, 0.7\u03a9 at 125\u00b0C."+ "description": "H-bridge positive output to motor. Rated for ±2.8A peak current, typical RDS(on) = 0.4Ω at 25°C, 0.7Ω at 125°C." }, { "number": "8", "name": "SENSE", "type": "output",- "description": "Current sense return output. Connect external 0.2\u03a9 sense resistor between SENSE pin and ground to set overcurrent threshold at 500mV (2.8A typical); adjustable via RSENSE value."+ "description": "Current sense return output. Connect external 0.2Ω sense resistor between SENSE pin and ground to set overcurrent threshold at 500mV (2.8A typical); adjustable via RSENSE value." }, { "number": "9", "name": "VBB", "type": "power_in",- "description": "Motor driver supply voltage input, operating range 8V to 36V. Bypass to GND with 0.1\u00b5F ceramic + 100\u00b5F bulk capacitor. Undervoltage lockout threshold 6.5V rising."+ "description": "Motor driver supply voltage input, operating range 8V to 36V. Bypass to GND with 0.1µF ceramic + 100µF bulk capacitor. Undervoltage lockout threshold 6.5V rising." }, { "number": "10", "name": "OUT-", "type": "output",- "description": "H-bridge negative output to motor. Rated for \u00b12.8A peak current, typical RDS(on) = 0.4\u03a9 at 25\u00b0C, 0.7\u03a9 at 125\u00b0C."+ "description": "H-bridge negative output to motor. Rated for ±2.8A peak current, typical RDS(on) = 0.4Ω at 25°C, 0.7Ω at 125°C." }, { "number": "11", "name": "CP1", "type": "passive",- "description": "Charge pump switching node. Connect 0.1\u00b5F X7R ceramic capacitor between CP1 and CP2; capacitor must be rated for VBB voltage."+ "description": "Charge pump switching node. Connect 0.1µF X7R ceramic capacitor between CP1 and CP2; capacitor must be rated for VBB voltage." }, { "number": "12", "name": "CP2", "type": "passive",- "description": "Charge pump switching node. Connect 0.1\u00b5F X7R ceramic capacitor between CP1 and CP2; capacitor must be rated for VBB voltage."+ "description": "Charge pump switching node. Connect 0.1µF X7R ceramic capacitor between CP1 and CP2; capacitor must be rated for VBB voltage." }, { "number": "13",@@ -131,7 +131,7 @@ "number": "14", "name": "VCP", "type": "power_out",- "description": "Charge pump output and gate drive supply reservoir. Connect 0.1\u00b5F 16V X7R ceramic capacitor to VBB. Monitored internally; outputs disable if VCP falls below charge pump undervoltage threshold."+ "description": "Charge pump output and gate drive supply reservoir. Connect 0.1µF 16V X7R ceramic capacitor to VBB. Monitored internally; outputs disable if VCP falls below charge pump undervoltage threshold." }, { "number": "15",@@ -188,6 +188,46 @@ "viewers": { "symbol": "viewers/symbol.html", "footprint": "viewers/footprint.html"- }+ },+ "models_3d": [+ {+ "file": "drv8800pwpr.step",+ "role": "plain",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 6.4,+ 5.0,+ 1.1+ ],+ "zmin_mm": -0.0,+ "centre_offset_mm": 0.0,+ "footprint_binding": "identity",+ "sha256": "7982746831c0bd23f4690608869ad67776faae5c762fb0376666126a3998921b",+ "checked": "2026-10-07",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ },+ {+ "file": "drv8800pwpr-etched.step",+ "role": "eda",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 6.4,+ 5.0,+ 1.1+ ],+ "zmin_mm": -0.0,+ "centre_offset_mm": 0.0,+ "footprint_binding": "identity",+ "sha256": "2b1ad71504bea5eb595decd390cfa479e77b7683640c76b997911d3fd823a6ca",+ "checked": "2026-10-07",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ }+ ] }-}+}
page.json+42−2@@ -173,7 +173,47 @@ "viewers": { "symbol": "viewers/symbol.html", "footprint": "viewers/footprint.html"- }+ },+ "models_3d": [+ {+ "file": "drv8800pwpr.step",+ "role": "plain",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 6.4,+ 5.0,+ 1.1+ ],+ "zmin_mm": -0.0,+ "centre_offset_mm": 0.0,+ "footprint_binding": "identity",+ "sha256": "7982746831c0bd23f4690608869ad67776faae5c762fb0376666126a3998921b",+ "checked": "2026-10-07",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ },+ {+ "file": "drv8800pwpr-etched.step",+ "role": "eda",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 6.4,+ 5.0,+ 1.1+ ],+ "zmin_mm": -0.0,+ "centre_offset_mm": 0.0,+ "footprint_binding": "identity",+ "sha256": "2b1ad71504bea5eb595decd390cfa479e77b7683640c76b997911d3fd823a6ca",+ "checked": "2026-10-07",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ }+ ] }, "metadata": { "specs": {@@ -221,4 +261,4 @@ "public": true }, "updated_at": "2026-09-24T20:00:45.819Z"-}+}