component
DRV8436PRGER
Public Made by Adomby adom
Texas Instruments Stepper Motor Driver, VQFN-24-EP(4x4). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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README.mdadded+62@@ -0,0 +1,62 @@+# DRV8436PRGER++**Texas Instruments** · Stepper Motor Driver · VQFN-24-EP(4x4)++DRV8436PRGER from Texas Instruments, in a VQFN-24-EP(4x4). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | VM | power_in | Motor supply input, recommended range 4.5 V to 48 V; bypass with two 0.01 µF ceramic capacitors rated VM, placed close to the pin, plus a bulk capacitor rated above the operating voltage. |+| 2 | PGND | power_in | Power ground; the two PGND pins are internally shorted and must be connected to the system ground on the PCB. |+| 3 | AOUT1 | output | Winding A output connected to the motor winding; continuous phase-node voltage is limited to -1 V to VM + 1 V. |+| 4 | AOUT2 | output | Winding A output connected to the motor winding; continuous phase-node voltage is limited to -1 V to VM + 1 V. |+| 5 | BOUT2 | output | Winding B output connected to the motor winding; continuous phase-node voltage is limited to -1 V to VM + 1 V. |+| 6 | BOUT1 | output | Winding B output connected to the motor winding; continuous phase-node voltage is limited to -1 V to VM + 1 V. |+| 7 | PGND | power_in | Power ground; internally shorted to the other PGND pin and connected to the system ground on the PCB. |+| 8 | VM | power_in | Motor supply input, recommended range 4.5 V to 48 V; bypass to GND with a 0.01 µF ceramic capacitor rated VM close to the pin and share the bulk capacitor. |+| 9 | GND | power_in | Device ground; connect to the system ground. |+| 10 | DVDD | power_out | Internal 5 V logic regulator output, supplying up to 2 mA; bypass to GND with a 0.47 µF X7R ceramic capacitor rated 6.3 V or 10 V. |+| 11 | nFAULT | output | Open-drain fault indicator that is pulled low during a fault and requires an external pull-up resistor; sink current is limited to 10 mA maximum. |+| 12 | VREFB | input | Reference voltage input that sets the full-scale chopping current of bridge B (IFS = VREFB / 2.2 V/A); maximum 3.3 V. |+| 13 | VREFA | input | Reference voltage input that sets the full-scale chopping current of bridge A (IFS = VREFA / 2.2 V/A); maximum 3.3 V. |+| 14 | TOFF | input | Four-level input that sets the PWM off-time: GND = 7 µs, DVDD = 16 µs, high-impedance = 24 µs, 330 kΩ to GND = 32 µs. |+| 15 | BDECAY | input | Four-level input that sets the decay mode of bridge B (smart-tune dynamic, slow, 30% mixed, or fast decay). |+| 16 | ADECAY | input | Four-level input that sets the decay mode of bridge A (smart-tune dynamic, slow, 30% mixed, or fast decay). |+| 17 | BIN2 | input | Bridge B PWM input that controls the H-bridge B state; internal pull-down, logic low maximum 0.6 V and logic high 1.5 V to 5.5 V. |+| 18 | BIN1 | input | Bridge B PWM input that controls the H-bridge B state; internal pull-down, logic low maximum 0.6 V and logic high 1.5 V to 5.5 V. |+| 19 | AIN2 | input | Bridge A PWM input that controls the H-bridge A state; internal pull-down, logic low maximum 0.6 V and logic high 1.5 V to 5.5 V. |+| 20 | AIN1 | input | Bridge A PWM input that controls the H-bridge A state; internal pull-down, logic low maximum 0.6 V and logic high 1.5 V to 5.5 V. |+| 21 | nSLEEP | input | Sleep-mode input: logic high enables the device and logic low places it in low-power sleep; internal pull-down, and it must not be tied to DVDD. |+| 22 | CPL | passive | Charge-pump negative switch node; a 0.022 µF X7R ceramic capacitor rated VM is connected between CPH and CPL. |+| 23 | CPH | passive | Charge-pump switch node; a 0.022 µF X7R ceramic capacitor rated VM is connected between CPH and CPL. |+| 24 | VCP | power_out | Charge-pump output, nominally VM + 5 V; connect a 0.22 µF 16 V X7R ceramic capacitor between VCP and VM. |+| 25 | PAD | power_in | Exposed thermal pad that must be soldered to the PCB and connected to the system ground. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | VQFN-24-EP(4x4) |+| Category | Motor Driver ICs |+| Pins | 25 |++## CAD (KiCad official)++- Symbol: `DRV8436PRGER`+- Footprint: `Package_DFN_QFN:QFN-24-1EP_4x4mm_P0.5mm_EP2.7x2.7mm`+- 3D model: VQFN-24-EP(4x4) (KiCad packages3D, STEP)+- 3D model files: `drv8436prger-etched.step` / `drv8436prger-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `drv8436prger.step` / `drv8436prger.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/drv8436e) (46 pp, sha256 `32cfac267bdda8d5`, retrieved 2026-10-08, tier: lcsc)+- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/drv8436prger-datasheet.pdf)
page.jsonadded+302@@ -0,0 +1,302 @@+{+ "slug": "drv8436prger",+ "version": "0.1.0",+ "type": "component",+ "description": "Texas Instruments Stepper Motor Driver, VQFN-24-EP(4x4). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",+ "tags": [+ "component",+ "motor driver ics",+ "drv8436prger",+ "factory-2.0.0",+ "extractor-text"+ ],+ "dependencies": {},+ "hero": {+ "type": "image",+ "path": "docs/hero.png"+ },+ "files": [+ "page.json",+ "README.md",+ "drv8436prger.kicad_sym",+ "drv8436prger.kicad_mod",+ "drv8436prger.glb",+ "drv8436prger.step",+ "drv8436prger.lbr",+ "docs/hero.png",+ "docs/drv8436prger-datasheet.pdf",+ "viewers/symbol.html",+ "viewers/footprint.html",+ "drv8436prger-hero.glb",+ "drv8436prger-hero.overlay.json"+ ],+ "component": {+ "mpn": "DRV8436PRGER",+ "manufacturer": "Texas Instruments",+ "package": "VQFN-24-EP(4x4)",+ "pin_count": 25,+ "category": "Motor Driver ICs",+ "subcategory": "Stepper Motor Driver",+ "datasheet": "https://www.ti.com/cn/lit/gpn/drv8436e",+ "parts": {+ "symbol": "drv8436prger.kicad_sym",+ "footprint": "drv8436prger.kicad_mod",+ "model_3d": "drv8436prger-hero.glb",+ "model_3d_plain": "drv8436prger.glb",+ "model_3d_step": "drv8436prger-etched.step",+ "model_3d_step_plain": "drv8436prger.step",+ "lbr": "drv8436prger.lbr"+ },+ "distributor_links": {+ "lcsc": "C1518719",+ "digikey": "296-DRV8436PRGERTR-ND",+ "mouser": "595-DRV8436PRGER"+ },+ "distributor_check": {+ "checked_at": "2026-10-08T02:59:07Z",+ "source": "Component Ocean /api/assign-pns",+ "digikey": {+ "pn": "296-DRV8436PRGERTR-ND",+ "status": "found",+ "lifecycle": "Active"+ },+ "mouser": {+ "pn": "595-DRV8436PRGER",+ "status": "found"+ }+ },+ "pins": [+ {+ "number": "1",+ "name": "VM",+ "type": "power_in",+ "description": "Motor supply input, recommended range 4.5 V to 48 V; bypass with two 0.01 µF ceramic capacitors rated VM, placed close to the pin, plus a bulk capacitor rated above the operating voltage."+ },+ {+ "number": "2",+ "name": "PGND",+ "type": "power_in",+ "description": "Power ground; the two PGND pins are internally shorted and must be connected to the system ground on the PCB."+ },+ {+ "number": "3",+ "name": "AOUT1",+ "type": "output",+ "description": "Winding A output connected to the motor winding; continuous phase-node voltage is limited to -1 V to VM + 1 V."+ },+ {+ "number": "4",+ "name": "AOUT2",+ "type": "output",+ "description": "Winding A output connected to the motor winding; continuous phase-node voltage is limited to -1 V to VM + 1 V."+ },+ {+ "number": "5",+ "name": "BOUT2",+ "type": "output",+ "description": "Winding B output connected to the motor winding; continuous phase-node voltage is limited to -1 V to VM + 1 V."+ },+ {+ "number": "6",+ "name": "BOUT1",+ "type": "output",+ "description": "Winding B output connected to the motor winding; continuous phase-node voltage is limited to -1 V to VM + 1 V."+ },+ {+ "number": "7",+ "name": "PGND",+ "type": "power_in",+ "description": "Power ground; internally shorted to the other PGND pin and connected to the system ground on the PCB."+ },+ {+ "number": "8",+ "name": "VM",+ "type": "power_in",+ "description": "Motor supply input, recommended range 4.5 V to 48 V; bypass to GND with a 0.01 µF ceramic capacitor rated VM close to the pin and share the bulk capacitor."+ },+ {+ "number": "9",+ "name": "GND",+ "type": "power_in",+ "description": "Device ground; connect to the system ground."+ },+ {+ "number": "10",+ "name": "DVDD",+ "type": "power_out",+ "description": "Internal 5 V logic regulator output, supplying up to 2 mA; bypass to GND with a 0.47 µF X7R ceramic capacitor rated 6.3 V or 10 V."+ },+ {+ "number": "11",+ "name": "nFAULT",+ "type": "output",+ "description": "Open-drain fault indicator that is pulled low during a fault and requires an external pull-up resistor; sink current is limited to 10 mA maximum."+ },+ {+ "number": "12",+ "name": "VREFB",+ "type": "input",+ "description": "Reference voltage input that sets the full-scale chopping current of bridge B (IFS = VREFB / 2.2 V/A); maximum 3.3 V."+ },+ {+ "number": "13",+ "name": "VREFA",+ "type": "input",+ "description": "Reference voltage input that sets the full-scale chopping current of bridge A (IFS = VREFA / 2.2 V/A); maximum 3.3 V."+ },+ {+ "number": "14",+ "name": "TOFF",+ "type": "input",+ "description": "Four-level input that sets the PWM off-time: GND = 7 µs, DVDD = 16 µs, high-impedance = 24 µs, 330 kΩ to GND = 32 µs."+ },+ {+ "number": "15",+ "name": "BDECAY",+ "type": "input",+ "description": "Four-level input that sets the decay mode of bridge B (smart-tune dynamic, slow, 30% mixed, or fast decay)."+ },+ {+ "number": "16",+ "name": "ADECAY",+ "type": "input",+ "description": "Four-level input that sets the decay mode of bridge A (smart-tune dynamic, slow, 30% mixed, or fast decay)."+ },+ {+ "number": "17",+ "name": "BIN2",+ "type": "input",+ "description": "Bridge B PWM input that controls the H-bridge B state; internal pull-down, logic low maximum 0.6 V and logic high 1.5 V to 5.5 V."+ },+ {+ "number": "18",+ "name": "BIN1",+ "type": "input",+ "description": "Bridge B PWM input that controls the H-bridge B state; internal pull-down, logic low maximum 0.6 V and logic high 1.5 V to 5.5 V."+ },+ {+ "number": "19",+ "name": "AIN2",+ "type": "input",+ "description": "Bridge A PWM input that controls the H-bridge A state; internal pull-down, logic low maximum 0.6 V and logic high 1.5 V to 5.5 V."+ },+ {+ "number": "20",+ "name": "AIN1",+ "type": "input",+ "description": "Bridge A PWM input that controls the H-bridge A state; internal pull-down, logic low maximum 0.6 V and logic high 1.5 V to 5.5 V."+ },+ {+ "number": "21",+ "name": "nSLEEP",+ "type": "input",+ "description": "Sleep-mode input: logic high enables the device and logic low places it in low-power sleep; internal pull-down, and it must not be tied to DVDD."+ },+ {+ "number": "22",+ "name": "CPL",+ "type": "passive",+ "description": "Charge-pump negative switch node; a 0.022 µF X7R ceramic capacitor rated VM is connected between CPH and CPL."+ },+ {+ "number": "23",+ "name": "CPH",+ "type": "passive",+ "description": "Charge-pump switch node; a 0.022 µF X7R ceramic capacitor rated VM is connected between CPH and CPL."+ },+ {+ "number": "24",+ "name": "VCP",+ "type": "power_out",+ "description": "Charge-pump output, nominally VM + 5 V; connect a 0.22 µF 16 V X7R ceramic capacitor between VCP and VM."+ },+ {+ "number": "25",+ "name": "PAD",+ "type": "power_in",+ "description": "Exposed thermal pad that must be soldered to the PCB and connected to the system ground."+ }+ ],+ "provenance": {+ "extractor": "extract_pins 0.3",+ "factory_chain": {+ "factory": "2.0.0",+ "extractor": "extract_pins 0.3",+ "primary_model": "claude-haiku-5-5",+ "primary_mode": "text",+ "consensus_model": "claude-sonnet-5-5",+ "consensus": "agreed",+ "guards": "pin_guards 0.1: passed",+ "guard_notes": [+ "extractor flagged: The MPN DRV8436PRGER is the PWM-control variant (DRV8436P) in the 24-pin VQFN (RGE). Only the DRV843; The exposed thermal pad is not listed in Table 5-1. It is labeled 25 in the VQFN package drawing (pa; Pin types are mapped to KiCad classes from the datasheet's functional descriptions. DVDD is mapped t"+ ],+ "pages_sent": 46,+ "cost_usd": 0.1576,+ "at": "2026-10-08T02:58:50"+ },+ "datasheet": {+ "url": "https://www.ti.com/cn/lit/gpn/drv8436e",+ "pages": 46,+ "sha256": "32cfac267bdda8d5",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 25,+ "described": 25,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ },+ "models_3d": [+ {+ "file": "drv8436prger.step",+ "role": "plain",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 4,+ 4,+ 0.77+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "f7d256794c4147daf24dcae0554fae18510315e565ad1e239b475be7fef80d8b",+ "checked": "2026-10-08",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ },+ {+ "file": "drv8436prger-etched.step",+ "role": "eda",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 4,+ 4,+ 0.77+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "7bf6e44c7d7aec9dc53ed17893130ec6ab231b2ef80fd9245312a8340eb58474",+ "checked": "2026-10-08",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ }+ ]+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}