component
DRV8436ERGER
Public Made by Adomby adom
Texas Instruments Stepper Motor Driver, VQFN-24-EP(4x4). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownDRV8436ERGER
Texas Instruments · Stepper Motor Driver · VQFN-24-EP(4x4)
DRV8436ERGER from Texas Instruments, in a VQFN-24-EP(4x4). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VM | power_in | Motor supply input, 4.5 V to 48 V for normal DC operation, bypassed to GND with a 0.01 µF ceramic capacitor rated for VM and a bulk capacitor. |
| 2 | PGND | power_in | Power ground, internally shorted to pin 7, to be connected to system ground on the PCB. |
| 3 | AOUT1 | output | Bridge A output 1, connects to motor winding; full-scale current up to 1.5 A and 1.1 A rms depending on PCB design. |
| 4 | AOUT2 | output | Bridge A output 2, connects to motor winding; full-scale current up to 1.5 A and 1.1 A rms depending on PCB design. |
| 5 | BOUT2 | output | Bridge B output 2, connects to motor winding; full-scale current up to 1.5 A and 1.1 A rms depending on PCB design. |
| 6 | BOUT1 | output | Bridge B output 1, connects to motor winding; full-scale current up to 1.5 A and 1.1 A rms depending on PCB design. |
| 7 | PGND | power_in | Power ground, internally shorted to pin 2, to be connected to system ground on the PCB. |
| 8 | VM | power_in | Motor supply input, 4.5 V to 48 V for normal DC operation, internally tied to pin 1 and bypassed to GND. |
| 9 | GND | power_in | Device ground, to be connected to the system ground. |
| 10 | DVDD | power_out | Internal logic regulator output, nominal 5 V, supplies at most 2 mA; bypass to GND with a 0.47 µF X7R ceramic rated 6.3 V or 10 V. |
| 11 | nFAULT | output | Open-drain fault indicator, driven low on fault, requires an external pull-up (5 V or 3.3 V) and sinks up to 10 mA. |
| 12 | VREFB | input | Reference voltage input setting the full-scale chopping current of bridge B, maximum 3.3 V, with IFS = VREF / 2.2 V/A. |
| 13 | VREFA | input | Reference voltage input setting the full-scale chopping current of bridge A, maximum 3.3 V, with IFS = VREF / 2.2 V/A. |
| 14 | TOFF | input | Four-level input setting the PWM current-chopping off-time to 7, 16, 24 or 32 µs (GND, 1, Hi-Z, 330 kΩ to GND). |
| 15 | BDECAY | input | Four-level input setting the decay mode of bridge B (smart-tune, slow, mixed 30% fast, or fast). |
| 16 | ADECAY | input | Four-level input setting the decay mode of bridge A (smart-tune, slow, mixed 30% fast, or fast). |
| 17 | BPH | input | Bridge B phase input, logic high drives current from BOUT1 to BOUT2; logic input with VIH 1.5 V to 5.5 V and recommended input up to 5.3 V. |
| 18 | BEN | input | Bridge B enable input, logic high enables the bridge and logic low disables it to high impedance. |
| 19 | APH | input | Bridge A phase input, logic high drives current from AOUT1 to AOUT2; logic input with VIH 1.5 V to 5.5 V and recommended input up to 5.3 V. |
| 20 | AEN | input | Bridge A enable input, logic high enables the bridge and logic low disables it to high impedance. |
| 21 | nSLEEP | input | Sleep-mode input, logic high enables the device and logic low enters low-power sleep; internal pull-down, must not be tied to DVDD. |
| 22 | CPL | passive | Charge-pump switching node (negative side); connect a 0.022 µF X7R ceramic capacitor rated VM between CPH and CPL. |
| 23 | CPH | passive | Charge-pump switching node; connect a 0.022 µF X7R ceramic capacitor rated VM between CPH and CPL. |
| 24 | VCP | power_out | Charge-pump output, operates at VM + 5 V; connect a 0.22 µF 16 V X7R ceramic capacitor to VM. |
| 25 | Thermal pad (EP) | power_in | Exposed thermal pad, must be soldered to the PCB and connected to the system ground for thermal and electrical performance. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | VQFN-24-EP(4x4) |
| Category | Motor Driver ICs |
| Pins | 25 |
CAD (KiCad official)
- Symbol:
DRV8436ERGER - Footprint:
Package_DFN_QFN:QFN-24-1EP_4x4mm_P0.5mm_EP2.7x2.7mm - 3D model: VQFN-24-EP(4x4) (KiCad packages3D, STEP)
- 3D model files:
drv8436erger-etched.step/drv8436erger-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);drv8436erger.step/drv8436erger.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (46 pp, sha256
32cfac267bdda8d5, retrieved 2026-10-08, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).