DRV8434PRGER from Texas Instruments, in a VQFN-24(4x4). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	VM	power_in	Motor supply voltage input, operating range 4.5 V to 48 V, bypassed to PGND with 0.01 µF ceramic capacitors and a bulk capacitor rated for VM.
2	PGND	power_in	Power ground, to be connected to system ground.
3	AOUT1	output	Winding A output, connected to the motor winding; absolute maximum continuous node voltage −1 V to VM + 1 V.
4	AOUT2	output	Winding A output, connected to the motor winding; absolute maximum continuous node voltage −1 V to VM + 1 V.
5	BOUT2	output	Winding B output, connected to the motor winding; absolute maximum continuous node voltage −1 V to VM + 1 V.
6	BOUT1	output	Winding B output, connected to the motor winding; absolute maximum continuous node voltage −1 V to VM + 1 V.
7	PGND	power_in	Power ground, to be connected to system ground.
8	VM	power_in	Motor supply voltage input, operating range 4.5 V to 48 V, bypassed to PGND with 0.01 µF ceramic capacitors and a bulk capacitor rated for VM.
9	GND	power_in	Device ground, to be connected to system ground.
10	DVDD	power_out	Logic supply regulator output, nominal 5 V, supplying up to 2 mA; bypass to GND with a 0.47 µF to 1 µF X7R ceramic capacitor rated 6.3 V or 10 V.
11	nFAULT	output	Open-drain fault indicator, driven low during a fault and requires an external pull-up resistor; absolute maximum sink current 10 mA.
12	VREFB	input	Reference voltage input that sets the full-scale chopping current of H-bridge B; recommended VREF range 0.05 V to 3.3 V.
13	VREFA	input	Reference voltage input that sets the full-scale chopping current of H-bridge A; recommended VREF range 0.05 V to 3.3 V.
14	TOFF	input	Four-level pin that sets the PWM current-chopping off time to 7, 16, 24 or 32 µs.
15	BDECAY	input	Four-level pin that sets the decay mode of H-bridge B.
16	ADECAY	input	Four-level pin that sets the decay mode of H-bridge A.
17	BIN2	input	Bridge B PWM input that controls the H-bridge state; internal pull-down.
18	BIN1	input	Bridge B PWM input that controls the H-bridge state; internal pull-down.
19	AIN2	input	Bridge B PWM input that controls the H-bridge state; internal pull-down.
20	AIN1	input	Bridge A PWM input that controls the H-bridge state; internal pull-down.
21	nSLEEP	input	Sleep mode input: logic high enables the device, logic low enters low-power sleep; internal pull-down; a low pulse of 20 µs to 40 µs clears faults.
22	CPL	passive	Charge pump negative switching node; connect a X7R 0.022 µF ceramic capacitor rated VM between CPH and CPL.
23	CPH	passive	Charge pump switching node; connect a X7R 0.022 µF ceramic capacitor rated VM between CPH and CPL.
24	VCP	power_out	Charge pump output; connect a X7R 0.22 µF 16 V ceramic capacitor between VCP and VM.
25	EP	passive	Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter	Value
Manufacturer	Texas Instruments
Package	VQFN-24(4x4)
Category	Motor Driver ICs
Pins	25

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter	Symbol	Min	Typ	Max	Unit	Conditions	Page
VM operating supply current	IVM		5	6.5	mA	nSLEEP = 1，无电机负载	9
VM sleep mode supply current	IVMQ		2	4	μA	nSLEEP = 0	9
Reset pulse time	tRESET	20		40	μs	nSLEEP 低电平至清除故障	9
Wake-up time	tWAKE	0.8		1.2	ms	nSLEEP = 1 至输出转换	9
Turn-on time	tON	0.8		1.2	ms	VM > UVLO 至输出转换	9
Internal regulator voltage	VDVDD	4.75	5	5.25	V	无外部负载，6V < VVM < 48V	9
Internal regulator voltage at low VM	VDVDD	4.2		4.35	V	无外部负载，VVM = 4.5V	9
Input logic low voltage	VIL	0		0.6	V		9
Input logic high voltage	VIH	1.5		5.5	V		9
Input logic low leakage current	IIL	-1		1	μA	VIN = 0V	9
Four-level input low voltage	VI1	0		0.6	V	连接至 GND	9
Four-level input voltage (330kΩ to GND)	VI2	1	1.25	1.4	V	330kΩ ± 5% 至 GND	9
Four-level input high impedance voltage	VI3	1.8	2	2.2	V	高阻抗（>500kΩ 至 GND）	9
Four-level input logic high voltage	VI4	2.7		5.5	V	连接至 DVDD	9
nFAULT output logic low voltage	VOL			0.5	V	IO = 5mA	9
nFAULT output logic high leakage current	IOH	-1		1	μA		9
High-side FET on-resistance	RDS(ONH)	165		200	mΩ	TJ = 25°C、IO = -1A	9
High-side FET on-resistance	RDS(ONH)	250		300	mΩ	TJ = 125°C、IO = -1A	9
High-side FET on-resistance	RDS(ONH)	280		350	mΩ	TJ = 150°C、IO = -1A	9
Low-side FET on-resistance	RDS(ONL)	165		200	mΩ	TJ = 25°C、IO = 1A	9
Low-side FET on-resistance	RDS(ONL)	250		300	mΩ	TJ = 125°C、IO = 1A	9
Low-side FET on-resistance	RDS(ONL)	280		350	mΩ	TJ = 150°C、IO = 1A	9
Transconductance gain (transresistance)	KV	1.254	1.32	1.386	V/A	VREF = 3.3V	9
VREF leakage current	IVREF		8.25		μA	VREF = 3.3V	9
Current trip accuracy	ΔITRIP	-12		12	%	0.25A < IO < 0.5A	10
Current trip accuracy	ΔITRIP	-6		6	%	0.5A < IO < 1A	10
Current trip accuracy	ΔITRIP	-4		4	%	1A < IO < 2.5A	10
AOUT and BOUT current matching	IO,CH	-2.5		2.5	%	IO = 2.5A	10
VM UVLO falling threshold	VUVLO	4.1	4.25	4.35	V	VM 下降，UVLO 下降	10
VM UVLO rising threshold	VUVLO	4.2	4.35	4.45	V	VM 上升，UVLO 上升	10
Thermal shutdown temperature	TOTSD	150	165	180	°C	内核温度 TJ	10
Input logic high voltage	VIH		1.5		V		9
Input logic hysteresis	VHYS		150		mV		9
Input logic high current	IIH		100		μA	VIN = 5V	9
Propagation delay	tPD		800		ns	从 xPH、xEN、xINx 输入到电流改变	9
Output pull-up current	IO		10		μA		9
Output slew rate	tSR		240		V/µs	VM = 24V，IO = 1A，介于 10% 和 90% 之间	9
PWM off time TOFF=0	tOFF		7		μs	TOFF = 0	10
PWM off time TOFF=1	tOFF		16		μs	TOFF = 1	10
PWM off time TOFF high impedance	tOFF		24		μs	TOFF = 高阻态	10
PWM off time TOFF 330kΩ to GND	tOFF		32		μs	TOFF = 330kΩ 至 GND	10
Overcurrent protection threshold	IOCP		4		A	流经任何 FET 的电流	10
Overcurrent deglitch time	tOCP		2		μs		10
Thermal shutdown hysteresis	THYS_OTSD		20		°C	内核温度 TJ	10
Supply voltage VM operating range	VVM	4.5		48	V	可确保正常（直流）运行的电源电压范围	8
Logic level input voltage	VI	0		5.5	V	逻辑电平输入电压	8
Reference rms voltage range	VREF	0.05		3.3	V	基准 rms 电压范围（VREFA、VREFB）	8
Applied PWM signal frequency	ƒPWM	0		100	kHz	施加的 PWM 信号（APH、AEN、BPH、BEN、AIN1、AIN2、BIN1、BIN2）	8
Motor full-scale current	IFS	0		2.5	A	电机满量程电流 (xOUTx)	8
Motor rms current	Irms	0		1.8	A	电机均方根电流 (xOUTx)	8
Operating ambient temperature	TA	-40		125	°C	工作环境温度	8
Operating junction temperature	TJ	-40		150	°C	工作结温	8
Junction-to-ambient thermal resistance (VQFN)	RθJA		39		°C/W	RGE (VQFN) 24 引脚	8
Junction-to-case (top) thermal resistance (VQFN)	RθJC(top)		28.9		°C/W	RGE (VQFN) 24 引脚	8
Junction-to-board thermal resistance (VQFN)	RθJB		16		°C/W	RGE (VQFN) 24 引脚	8
Junction-to-board characterization parameter (VQFN)	ψJB		15.9		°C/W	RGE (VQFN) 24 引脚	8
Junction-to-case (bottom) thermal resistance (VQFN)	RθJC(bot)		3.4		°C/W	RGE (VQFN) 24 引脚	8

CAD (KiCad official)

Symbol: DRV8434PRGER
Footprint: Package_DFN_QFN:QFN-24-1EP_4x4mm_P0.5mm_EP2.6x2.6mm
3D model: VQFN-24(4x4) (KiCad packages3D, STEP)
3D model files: drv8434prger-etched.step / drv8434prger-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); drv8434prger.step / drv8434prger.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Texas Instruments datasheet (49 pp, sha256 2fcf23c37e777f4b, retrieved 2026-11-05, tier: manufacturer)
Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF

DRV8434PRGER

Verified DRV8434PRGER

Verification log 1 record

3D Model

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Schematic Symbol

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Datasheet

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