# DRV8425PWPR

**Texas Instruments** · Stepper Motor Driver · HTSSOP-28-EP

DRV8425PWPR from Texas Instruments, in a HTSSOP-28-EP. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VCP | power_out | Charge pump output voltage supplying gate driver power; connect 0.22µF 16V X7R ceramic capacitor to VM. |
| 2 | VM | power_in | Motor power supply voltage input ranging 4.5V to 33V; bypass each pin with 0.01µF ceramic capacitor and bulk capacitor to PGND. |
| 3 | PGND | power_in | Power ground connection for motor power supply; connect to system ground. |
| 4 | AOUT1 | output | Winding A output channel 1 for stepper motor phase A drive; connect to motor winding. |
| 5 | AOUT1 | output | Winding A output channel 1 (parallel pin) for stepper motor phase A drive; connect to motor winding. |
| 6 | AOUT2 | output | Winding A output channel 2 for stepper motor phase A drive; connect to motor winding. |
| 7 | AOUT2 | output | Winding A output channel 2 (parallel pin) for stepper motor phase A drive; connect to motor winding. |
| 8 | BOUT2 | output | Winding B output channel 2 for stepper motor phase B drive; connect to motor winding. |
| 9 | BOUT2 | output | Winding B output channel 2 (parallel pin) for stepper motor phase B drive; connect to motor winding. |
| 10 | BOUT1 | output | Winding B output channel 1 for stepper motor phase B drive; connect to motor winding. |
| 11 | BOUT1 | output | Winding B output channel 1 (parallel pin) for stepper motor phase B drive; connect to motor winding. |
| 12 | PGND | power_in | Power ground connection for motor power supply; connect to system ground. |
| 13 | VM | power_in | Motor power supply voltage input ranging 4.5V to 33V; bypass with 0.01µF ceramic capacitor and bulk capacitor to PGND. |
| 14 | GND | power_in | Device logic ground; connect to system ground. |
| 15 | DVDD | power_out | Internal regulator output providing 4.75V to 5.25V logic power; bypass with 0.47µF to 1µF X7R ceramic capacitor to GND. |
| 16 | nFAULT | output | Fault status indicator open-drain output; pulled low during fault conditions (UVLO, CPUV, OCP, OTSD); requires external pull-up resistor to VCC. |
| 17 | VREF | power_in | Current set reference input voltage with maximum 2.64V for DRV8425; sets full-scale motor current via current control DAC (KV = 1.32 V/A). |
| 18 | M0 | input | Microstepping mode setting pin with internal pull-down resistor; configure with M1 to select step resolution from full-step to 1/256 microstep. |
| 19 | TOFF | input | PWM chopping OFF-time four-level input pin; sets 7µs, 16µs, 24µs, or 32µs OFF duration and ripple current in intelligent tuning mode. |
| 20 | DECAY1 | input | Decay mode setting pin with internal pull-down resistor; configure with DECAY0 to select decay strategy (smart tuning, mixed, slow). |
| 21 | DECAY0 | input | Decay mode setting pin with internal pull-down resistor; configure with DECAY1 to select decay strategy (smart tuning, mixed, slow). |
| 22 | M1 | input | Microstepping mode setting four-level input pin; configure with M0 to select step resolution from full-step to 1/256 microstep. |
| 23 | STEP | input | Stepper motor step command input with internal pull-down; rising edge advances motor one microstep; maximum 500kHz input frequency. |
| 24 | DIR | input | Motor rotation direction control input with internal pull-down; logic level selects clockwise or counter-clockwise stepping direction. |
| 25 | ENABLE | input | Device output enable control input with internal pull-up to DVDD; logic low disables all outputs, logic high enables normal operation. |
| 26 | nSLEEP | input | Sleep mode control input with internal pull-down; logic high enables device, logic low enters 2µA low-power sleep mode; low pulse clears fault. |
| 27 | CPL | passive | Charge pump negative switching node; connect 0.022µF X7R ceramic capacitor between CPL and CPH for charge pump energy storage. |
| 28 | CPH | passive | Charge pump positive switching node; connect 0.022µF X7R ceramic capacitor between CPH and CPL for charge pump energy storage. |
| 29 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | HTSSOP-28-EP |
| Category | Motor Driver ICs |
| Pins | 29 |

## CAD (KiCad official)

- Symbol: `DRV8425PWPR`
- Footprint: `Package_SO:TSSOP-28-1EP_4.4x9.7mm_P0.65mm_EP2.85x6.7mm`
- 3D model: HTSSOP-28-EP (KiCad packages3D, STEP)
- 3D model files: `drv8425pwpr-etched.step` / `drv8425pwpr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `drv8425pwpr.step` / `drv8425pwpr.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/drv8425) (56 pp, sha256 `d2894da743bf3f58`, retrieved 2026-09-23, tier: lcsc)
- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.2`, primary `claude-haiku-4-5-20251001` (text), consensus `claude-sonnet-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/drv8425pwpr-datasheet.pdf)