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DRV8353RHRGZR
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Texas Instruments Brushless DC (BLDC) Motor Driver, VQFN-48-EP(7x7). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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README.mdadded+86@@ -0,0 +1,86 @@+# DRV8353RHRGZR++**Texas Instruments** · Brushless DC (BLDC) Motor Driver · VQFN-48-EP(7x7)++DRV8353RHRGZR from Texas Instruments, in a VQFN-48-EP(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | GND | power_in | Device power ground. Connect to system ground. |+| 2 | VGLS | power_out | 11-V internal regulator output. Connect a X5R or X7R, 1-µF, 16-V ceramic capacitor between the VGLS and GND pins. |+| 3 | CPL | power_out | Charge pump switching node. Connect a X5R or X7R, 47-nF, VDRAIN-rated ceramic capacitor between the CPH and CPL pins. |+| 4 | CPH | power_out | Charge pump switching node. Connect a X5R or X7R, 47-nF, VDRAIN-rated ceramic capacitor between the CPH and CPL pins. |+| 5 | VM | power_in | Gate driver power supply input. Connect to either VDRAIN or separate gate driver supply voltage with 0.1-µF, VM-rated ceramic and ≥10-µF local capacitance between the VM and GND pins. |+| 6 | VDRAIN | power_in | High-side MOSFET drain sense input and charge pump reference. Connect to the common point of the MOSFET drains. |+| 7 | VCP | power_out | Charge pump output. Connect a X5R or X7R, 1-µF, 16-V ceramic capacitor between the VCP and VDRAIN pins. |+| 8 | GHA | output | High-side gate driver output. Connect to the gate of the high-side power MOSFET. |+| 9 | SHA | input | High-side source sense input. Connect to the high-side power MOSFET source. |+| 10 | GLA | output | Low-side gate driver output. Connect to the gate of the low-side power MOSFET. |+| 11 | SPA | input | Low-side source sense and shunt amplifier input. Connect to the low-side power MOSFET source and high-side of the current shunt resistor. |+| 12 | SNA | input | Shunt amplifier input. Connect to the low-side of the current shunt resistor. |+| 13 | SNB | input | Shunt amplifier input. Connect to the low-side of the current shunt resistor. |+| 14 | SPB | input | Low-side source sense and shunt amplifier input. Connect to the low-side power MOSFET source and high-side of the current shunt resistor. |+| 15 | GLB | output | Low-side gate driver output. Connect to the gate of the low-side power MOSFET. |+| 16 | SHB | input | High-side source sense input. Connect to the high-side power MOSFET source. |+| 17 | GHB | output | High-side gate driver output. Connect to the gate of the high-side power MOSFET. |+| 18 | GHC | output | High-side gate driver output. Connect to the gate of the high-side power MOSFET. |+| 19 | SHC | input | High-side source sense input. Connect to the high-side power MOSFET source. |+| 20 | GLC | output | Low-side gate driver output. Connect to the gate of the low-side power MOSFET. |+| 21 | SPC | input | Low-side source sense and shunt amplifier input. Connect to the low-side power MOSFET source and high-side of the current shunt resistor. |+| 22 | SNC | input | Shunt amplifier input. Connect to the low-side of the current shunt resistor. |+| 23 | SOC | output | Shunt amplifier output. |+| 24 | SOB | output | Shunt amplifier output. |+| 25 | SOA | output | Shunt amplifier output. |+| 26 | VREF | power_out | Shunt amplifier power supply input and reference. Connect a X5R or X7R, 0.1-µF, 6.3-V ceramic capacitor between the VREF and AGND pins. |+| 27 | AGND | power_in | Device analog ground. Connect to system ground. |+| 28 | nFAULT | tri_state | Fault indicator output. This pin is pulled logic low during a fault condition and requires an external pullup resistor. |+| 29 | MODE | input | PWM input mode setting. This pin is a 4 level input pin set by an external resistor. |+| 30 | IDRIVE | input | Gate drive output current setting. This pin is a 7 level input pin set by an external resistor. |+| 31 | VDS | input | VDS monitor trip point setting. This pin is a 7 level input pin set by an external resistor. |+| 32 | GAIN | input | Amplifier gain setting. The pin is a 4 level input pin set by an external resistor. |+| 33 | ENABLE | input | Gate driver enable. When this pin is logic low the device goes to a low power sleep mode. An 8 to 40-µs low pulse can be used to reset fault conditions. |+| 34 | INHA | input | High-side gate driver control input. This pin controls the output of the high-side gate driver. |+| 35 | INLA | input | Low-side gate driver control input. This pin controls the output of the low-side gate driver. |+| 36 | INHB | input | High-side gate driver control input. This pin controls the output of the high-side gate driver. |+| 37 | INLB | input | Low-side gate driver control input. This pin controls the output of the low-side gate driver. |+| 38 | INHC | input | High-side gate driver control input. This pin controls the output of the high-side gate driver. |+| 39 | INLC | input | Low-side gate driver control input. This pin controls the output of the low-side gate driver. |+| 40 | DVDD | power_out | 5-V internal regulator output. Connect a X5R or X7R, 1-µF, 6.3-V ceramic capacitor between the DVDD and DGND pins. This regulator can source up to 10 mA externally. |+| 41 | DGND | power_in | Device digital ground. Connect to system ground. |+| 42 | SW | output | Buck switch node. Connect this pin to an inductor, diode, and the CB bootstrap capacitor. |+| 43 | VIN | power_in | Buck regulator power supply input. Place an X5R or X7R, VM-rated ceramic capacitor between the VIN and GND pins. |+| 44 | VCC | power_out | 7-V internal regulator output. Gate supply for buck switch. Connect a X5R or X7R, 0.47-µF, 16-V ceramic capacitor between the VCC and GND pins. |+| 45 | BST | power_in | Buck regulator bootstrap input. Connect a X5R or X7R, 0.01-µF, 16-V, capacitor between the BST and SW pins. |+| 46 | RCL | input | Current limit off time set input. Connect a resistor between RCL and GND. |+| 47 | RT/SD | input | On time set and remote shutdown input. Connect a resistor between RT/SD and VIN. |+| 48 | FB | input | Buck feedback input. A resistor divider from the buck post inductor output to this pin sets the buck output voltage. |+| 49 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | VQFN-48-EP(7x7) |+| Category | Motor Driver ICs |+| Pins | 49 |++## CAD (KiCad official)++- Symbol: `DRV8353RHRGZR`+- Footprint: `Package_DFN_QFN:QFN-48-1EP_7x7mm_P0.5mm_EP5.15x5.15mm`+- 3D model: VQFN-48-EP(7x7) (KiCad packages3D, STEP)+- 3D model files: `drv8353rhrgzr-etched.step` / `drv8353rhrgzr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `drv8353rhrgzr.step` / `drv8353rhrgzr.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/drv8353) (101 pp, sha256 `4ab34376642b461e`, retrieved 2026-10-01, tier: lcsc)+- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-4-5-20251001` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/drv8353rhrgzr-datasheet.pdf)
page.jsonadded+404@@ -0,0 +1,404 @@+{+ "slug": "drv8353rhrgzr",+ "version": "0.1.0",+ "type": "component",+ "description": "Texas Instruments Brushless DC (BLDC) Motor Driver, VQFN-48-EP(7x7). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",+ "tags": [+ "component",+ "motor driver ics",+ "drv8353rhrgzr",+ "factory-2.0.0",+ "extractor-text"+ ],+ "dependencies": {},+ "hero": {+ "type": "image",+ "path": "docs/hero.png"+ },+ "files": [+ "page.json",+ "README.md",+ "drv8353rhrgzr.kicad_sym",+ "drv8353rhrgzr.kicad_mod",+ "drv8353rhrgzr.glb",+ "drv8353rhrgzr.step",+ "drv8353rhrgzr.lbr",+ "docs/hero.png",+ "docs/drv8353rhrgzr-datasheet.pdf",+ "viewers/symbol.html",+ "viewers/footprint.html"+ ],+ "component": {+ "mpn": "DRV8353RHRGZR",+ "manufacturer": "Texas Instruments",+ "package": "VQFN-48-EP(7x7)",+ "pin_count": 49,+ "category": "Motor Driver ICs",+ "subcategory": "Brushless DC (BLDC) Motor Driver",+ "datasheet": "https://www.ti.com/cn/lit/gpn/drv8353",+ "parts": {+ "symbol": "drv8353rhrgzr.kicad_sym",+ "footprint": "drv8353rhrgzr.kicad_mod",+ "model_3d": "drv8353rhrgzr-etched.glb",+ "model_3d_plain": "drv8353rhrgzr.glb",+ "model_3d_step": "drv8353rhrgzr-etched.step",+ "model_3d_step_plain": "drv8353rhrgzr.step",+ "lbr": "drv8353rhrgzr.lbr"+ },+ "distributor_links": {+ "lcsc": "C2868224",+ "digikey": "296-DRV8353RHRGZRTR-ND",+ "mouser": "595-DRV8353RHRGZR"+ },+ "distributor_check": {+ "checked_at": "2026-10-01T06:24:33Z",+ "source": "Component Ocean /api/assign-pns",+ "digikey": {+ "pn": "296-DRV8353RHRGZRTR-ND",+ "status": "found",+ "lifecycle": "Active"+ },+ "mouser": {+ "pn": "595-DRV8353RHRGZR",+ "status": "found"+ }+ },+ "pins": [+ {+ "number": "1",+ "name": "GND",+ "type": "power_in",+ "description": "Device power ground. Connect to system ground."+ },+ {+ "number": "2",+ "name": "VGLS",+ "type": "power_out",+ "description": "11-V internal regulator output. Connect a X5R or X7R, 1-µF, 16-V ceramic capacitor between the VGLS and GND pins."+ },+ {+ "number": "3",+ "name": "CPL",+ "type": "power_out",+ "description": "Charge pump switching node. Connect a X5R or X7R, 47-nF, VDRAIN-rated ceramic capacitor between the CPH and CPL pins."+ },+ {+ "number": "4",+ "name": "CPH",+ "type": "power_out",+ "description": "Charge pump switching node. Connect a X5R or X7R, 47-nF, VDRAIN-rated ceramic capacitor between the CPH and CPL pins."+ },+ {+ "number": "5",+ "name": "VM",+ "type": "power_in",+ "description": "Gate driver power supply input. Connect to either VDRAIN or separate gate driver supply voltage with 0.1-µF, VM-rated ceramic and ≥10-µF local capacitance between the VM and GND pins."+ },+ {+ "number": "6",+ "name": "VDRAIN",+ "type": "power_in",+ "description": "High-side MOSFET drain sense input and charge pump reference. Connect to the common point of the MOSFET drains."+ },+ {+ "number": "7",+ "name": "VCP",+ "type": "power_out",+ "description": "Charge pump output. Connect a X5R or X7R, 1-µF, 16-V ceramic capacitor between the VCP and VDRAIN pins."+ },+ {+ "number": "8",+ "name": "GHA",+ "type": "output",+ "description": "High-side gate driver output. Connect to the gate of the high-side power MOSFET."+ },+ {+ "number": "9",+ "name": "SHA",+ "type": "input",+ "description": "High-side source sense input. Connect to the high-side power MOSFET source."+ },+ {+ "number": "10",+ "name": "GLA",+ "type": "output",+ "description": "Low-side gate driver output. Connect to the gate of the low-side power MOSFET."+ },+ {+ "number": "11",+ "name": "SPA",+ "type": "input",+ "description": "Low-side source sense and shunt amplifier input. Connect to the low-side power MOSFET source and high-side of the current shunt resistor."+ },+ {+ "number": "12",+ "name": "SNA",+ "type": "input",+ "description": "Shunt amplifier input. Connect to the low-side of the current shunt resistor."+ },+ {+ "number": "13",+ "name": "SNB",+ "type": "input",+ "description": "Shunt amplifier input. Connect to the low-side of the current shunt resistor."+ },+ {+ "number": "14",+ "name": "SPB",+ "type": "input",+ "description": "Low-side source sense and shunt amplifier input. Connect to the low-side power MOSFET source and high-side of the current shunt resistor."+ },+ {+ "number": "15",+ "name": "GLB",+ "type": "output",+ "description": "Low-side gate driver output. Connect to the gate of the low-side power MOSFET."+ },+ {+ "number": "16",+ "name": "SHB",+ "type": "input",+ "description": "High-side source sense input. Connect to the high-side power MOSFET source."+ },+ {+ "number": "17",+ "name": "GHB",+ "type": "output",+ "description": "High-side gate driver output. Connect to the gate of the high-side power MOSFET."+ },+ {+ "number": "18",+ "name": "GHC",+ "type": "output",+ "description": "High-side gate driver output. Connect to the gate of the high-side power MOSFET."+ },+ {+ "number": "19",+ "name": "SHC",+ "type": "input",+ "description": "High-side source sense input. Connect to the high-side power MOSFET source."+ },+ {+ "number": "20",+ "name": "GLC",+ "type": "output",+ "description": "Low-side gate driver output. Connect to the gate of the low-side power MOSFET."+ },+ {+ "number": "21",+ "name": "SPC",+ "type": "input",+ "description": "Low-side source sense and shunt amplifier input. Connect to the low-side power MOSFET source and high-side of the current shunt resistor."+ },+ {+ "number": "22",+ "name": "SNC",+ "type": "input",+ "description": "Shunt amplifier input. Connect to the low-side of the current shunt resistor."+ },+ {+ "number": "23",+ "name": "SOC",+ "type": "output",+ "description": "Shunt amplifier output."+ },+ {+ "number": "24",+ "name": "SOB",+ "type": "output",+ "description": "Shunt amplifier output."+ },+ {+ "number": "25",+ "name": "SOA",+ "type": "output",+ "description": "Shunt amplifier output."+ },+ {+ "number": "26",+ "name": "VREF",+ "type": "power_out",+ "description": "Shunt amplifier power supply input and reference. Connect a X5R or X7R, 0.1-µF, 6.3-V ceramic capacitor between the VREF and AGND pins."+ },+ {+ "number": "27",+ "name": "AGND",+ "type": "power_in",+ "description": "Device analog ground. Connect to system ground."+ },+ {+ "number": "28",+ "name": "nFAULT",+ "type": "tri_state",+ "description": "Fault indicator output. This pin is pulled logic low during a fault condition and requires an external pullup resistor."+ },+ {+ "number": "29",+ "name": "MODE",+ "type": "input",+ "description": "PWM input mode setting. This pin is a 4 level input pin set by an external resistor."+ },+ {+ "number": "30",+ "name": "IDRIVE",+ "type": "input",+ "description": "Gate drive output current setting. This pin is a 7 level input pin set by an external resistor."+ },+ {+ "number": "31",+ "name": "VDS",+ "type": "input",+ "description": "VDS monitor trip point setting. This pin is a 7 level input pin set by an external resistor."+ },+ {+ "number": "32",+ "name": "GAIN",+ "type": "input",+ "description": "Amplifier gain setting. The pin is a 4 level input pin set by an external resistor."+ },+ {+ "number": "33",+ "name": "ENABLE",+ "type": "input",+ "description": "Gate driver enable. When this pin is logic low the device goes to a low power sleep mode. An 8 to 40-µs low pulse can be used to reset fault conditions."+ },+ {+ "number": "34",+ "name": "INHA",+ "type": "input",+ "description": "High-side gate driver control input. This pin controls the output of the high-side gate driver."+ },+ {+ "number": "35",+ "name": "INLA",+ "type": "input",+ "description": "Low-side gate driver control input. This pin controls the output of the low-side gate driver."+ },+ {+ "number": "36",+ "name": "INHB",+ "type": "input",+ "description": "High-side gate driver control input. This pin controls the output of the high-side gate driver."+ },+ {+ "number": "37",+ "name": "INLB",+ "type": "input",+ "description": "Low-side gate driver control input. This pin controls the output of the low-side gate driver."+ },+ {+ "number": "38",+ "name": "INHC",+ "type": "input",+ "description": "High-side gate driver control input. This pin controls the output of the high-side gate driver."+ },+ {+ "number": "39",+ "name": "INLC",+ "type": "input",+ "description": "Low-side gate driver control input. This pin controls the output of the low-side gate driver."+ },+ {+ "number": "40",+ "name": "DVDD",+ "type": "power_out",+ "description": "5-V internal regulator output. Connect a X5R or X7R, 1-µF, 6.3-V ceramic capacitor between the DVDD and DGND pins. This regulator can source up to 10 mA externally."+ },+ {+ "number": "41",+ "name": "DGND",+ "type": "power_in",+ "description": "Device digital ground. Connect to system ground."+ },+ {+ "number": "42",+ "name": "SW",+ "type": "output",+ "description": "Buck switch node. Connect this pin to an inductor, diode, and the CB bootstrap capacitor."+ },+ {+ "number": "43",+ "name": "VIN",+ "type": "power_in",+ "description": "Buck regulator power supply input. Place an X5R or X7R, VM-rated ceramic capacitor between the VIN and GND pins."+ },+ {+ "number": "44",+ "name": "VCC",+ "type": "power_out",+ "description": "7-V internal regulator output. Gate supply for buck switch. Connect a X5R or X7R, 0.47-µF, 16-V ceramic capacitor between the VCC and GND pins."+ },+ {+ "number": "45",+ "name": "BST",+ "type": "power_in",+ "description": "Buck regulator bootstrap input. Connect a X5R or X7R, 0.01-µF, 16-V, capacitor between the BST and SW pins."+ },+ {+ "number": "46",+ "name": "RCL",+ "type": "input",+ "description": "Current limit off time set input. Connect a resistor between RCL and GND."+ },+ {+ "number": "47",+ "name": "RT/SD",+ "type": "input",+ "description": "On time set and remote shutdown input. Connect a resistor between RT/SD and VIN."+ },+ {+ "number": "48",+ "name": "FB",+ "type": "input",+ "description": "Buck feedback input. A resistor divider from the buck post inductor output to this pin sets the buck output voltage."+ },+ {+ "number": "49",+ "name": "EP",+ "type": "passive",+ "description": "Exposed pad (from the footprint; not named in the datasheet pin table)."+ }+ ],+ "provenance": {+ "extractor": "extract_pins 0.3",+ "factory_chain": {+ "factory": "2.0.0",+ "extractor": "extract_pins 0.3",+ "primary_model": "claude-haiku-4-5-20251001",+ "primary_mode": "text",+ "consensus_model": "claude-sonnet-5-5",+ "consensus": "agreed",+ "guards": "pin_guards 0.1: passed",+ "guard_notes": [+ "exposed pad 49 added from the footprint"+ ],+ "pages_sent": 14,+ "cost_usd": 0.2146,+ "at": "2026-10-01T06:24:15"+ },+ "datasheet": {+ "url": "https://www.ti.com/cn/lit/gpn/drv8353",+ "pages": 101,+ "sha256": "4ab34376642b461e",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 49,+ "described": 49,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ }+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}