component
DRV8353FHRTAR
Public Made by Adomby adom
Texas Instruments Brushless DC (BLDC) Motor Driver, WQFN-40-EP(6x6). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
← Commit history
drv8353fhrtar: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding)
2 files changed
+90−10
package.json+48−8@@ -65,7 +65,7 @@ "number": "3", "name": "VM", "type": "power_in",- "description": "Gate driver power supply input rated 9V to 75V. Connect to VDRAIN or separate gate driver power supply with X5R X7R 0.1\u00b5F capacitor and local bulk capacitance \u226510\u00b5F."+ "description": "Gate driver power supply input rated 9V to 75V. Connect to VDRAIN or separate gate driver power supply with X5R X7R 0.1µF capacitor and local bulk capacitance ≥10µF." }, { "number": "4",@@ -77,7 +77,7 @@ "number": "5", "name": "VCP", "type": "power_out",- "description": "Charge pump output providing voltage referenced to VDRAIN. Connect X5R or X7R 1\u00b5F 16V ceramic capacitor between VCP and VDRAIN."+ "description": "Charge pump output providing voltage referenced to VDRAIN. Connect X5R or X7R 1µF 16V ceramic capacitor between VCP and VDRAIN." }, { "number": "6",@@ -191,7 +191,7 @@ "number": "24", "name": "VREF", "type": "power_out",- "description": "Shunt amplifier power supply and reference voltage 3V to 5.5V. Connect X5R or X7R 0.1\u00b5F 6.3V ceramic capacitor between VREF and AGND."+ "description": "Shunt amplifier power supply and reference voltage 3V to 5.5V. Connect X5R or X7R 0.1µF 6.3V ceramic capacitor between VREF and AGND." }, { "number": "25",@@ -233,7 +233,7 @@ "number": "31", "name": "ENABLE", "type": "input",- "description": "Gate driver enable input rated 0V to 5.5V logic levels. Logic low enters sleep mode. 8-40\u00b5s low pulse resets latched faults."+ "description": "Gate driver enable input rated 0V to 5.5V logic levels. Logic low enters sleep mode. 8-40µs low pulse resets latched faults." }, { "number": "32",@@ -275,7 +275,7 @@ "number": "38", "name": "DVDD", "type": "power_out",- "description": "5V internal digital regulator output. Connect X5R or X7R 1\u00b5F 6.3V ceramic capacitor between DVDD and GND. Supplies up to 10mA externally."+ "description": "5V internal digital regulator output. Connect X5R or X7R 1µF 6.3V ceramic capacitor between DVDD and GND. Supplies up to 10mA externally." }, { "number": "39",@@ -287,7 +287,7 @@ "number": "40", "name": "VGLS", "type": "power_out",- "description": "11V internal low-side regulator output. Connect X5R or X7R 1\u00b5F 16V ceramic capacitor between VGLS and GND. Supplies low-side gate drive."+ "description": "11V internal low-side regulator output. Connect X5R or X7R 1µF 16V ceramic capacitor between VGLS and GND. Supplies low-side gate drive." }, { "number": "41",@@ -331,6 +331,46 @@ "viewers": { "symbol": "viewers/symbol.html", "footprint": "viewers/footprint.html"- }+ },+ "models_3d": [+ {+ "file": "drv8353fhrtar.step",+ "role": "plain",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 6.0,+ 6.0,+ 1.0+ ],+ "zmin_mm": 0.0,+ "centre_offset_mm": 0.0,+ "footprint_binding": "identity",+ "sha256": "e5b4286c2329085d9ef7f90d5eb5bf41a435241ecc1baaf1383823b6d6a946ae",+ "checked": "2026-10-07",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ },+ {+ "file": "drv8353fhrtar-etched.step",+ "role": "eda",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 6.0,+ 6.0,+ 1.0+ ],+ "zmin_mm": 0.0,+ "centre_offset_mm": 0.0,+ "footprint_binding": "identity",+ "sha256": "1c7e33664954ac0ef27df6f61ad3ea77a3005c758c6223a93b8f6a86d44e53a6",+ "checked": "2026-10-07",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ }+ ] }-}+}
page.json+42−2@@ -316,7 +316,47 @@ "viewers": { "symbol": "viewers/symbol.html", "footprint": "viewers/footprint.html"- }+ },+ "models_3d": [+ {+ "file": "drv8353fhrtar.step",+ "role": "plain",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 6.0,+ 6.0,+ 1.0+ ],+ "zmin_mm": 0.0,+ "centre_offset_mm": 0.0,+ "footprint_binding": "identity",+ "sha256": "e5b4286c2329085d9ef7f90d5eb5bf41a435241ecc1baaf1383823b6d6a946ae",+ "checked": "2026-10-07",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ },+ {+ "file": "drv8353fhrtar-etched.step",+ "role": "eda",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 6.0,+ 6.0,+ 1.0+ ],+ "zmin_mm": 0.0,+ "centre_offset_mm": 0.0,+ "footprint_binding": "identity",+ "sha256": "1c7e33664954ac0ef27df6f61ad3ea77a3005c758c6223a93b8f6a86d44e53a6",+ "checked": "2026-10-07",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ }+ ] }, "metadata": { "specs": {@@ -364,4 +404,4 @@ "public": true }, "updated_at": "2026-09-24T19:59:57.330Z"-}+}