component
DRV8323RSRGZT
Public Made by Adomby adom
Texas Instruments Brushless DC (BLDC) Motor Driver, VQFN-48-EP(7x7). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
← Commit history
README.mdadded+86@@ -0,0 +1,86 @@+# DRV8323RSRGZT++**Texas Instruments** · Brushless DC (BLDC) Motor Driver · VQFN-48-EP(7x7)++DRV8323RSRGZT from Texas Instruments, in a VQFN-48-EP(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | FB | input | Buck regulator feedback input for setting output voltage with external resistor divider. |+| 2 | PGND | power_in | Device power ground and return path for low-side MOSFET gate drive current; must be connected externally to AGND and BGND. |+| 3 | CPL | power_in | Charge pump switch node; connect X5R/X7R 47nF VM-rated capacitor between CPL and CPH. |+| 4 | CPH | power_in | Charge pump switch node; connect X5R/X7R 47nF VM-rated capacitor between CPH and CPL. |+| 5 | VCP | power_in | Charge pump output voltage; connect X5R/X7R 1µF 25V capacitor between VCP and VM. |+| 6 | VM | power_in | Gate driver power supply input for motor power and VDRAIN connection; connect 0.1µF/≥10µF VM-rated capacitor to PGND. |+| 7 | VDRAIN | input | High-side MOSFET drain sense input for VDS monitor at common drain point. |+| 8 | GHA | output | High-side gate driver output A for N-channel MOSFET gate connection. |+| 9 | SHA | bidirectional | High-side source pin connected to high-side MOSFET source; VDS monitor input and gate driver sink current output. |+| 10 | GLA | output | Low-side gate driver output A for N-channel MOSFET gate connection. |+| 11 | SPA | input | Low-side shunt amplifier input monitoring MOSFET source; connect to source and current sense resistor high side. |+| 12 | SNA | input | Current sense amplifier A input at low side of sense resistor; connect to PGND if CSA unused. |+| 13 | SNB | input | Current sense amplifier B input at low side of sense resistor; connect to PGND if CSA unused. |+| 14 | SPB | input | Low-side shunt amplifier B input monitoring MOSFET source; connect to source and current sense resistor high side. |+| 15 | GLB | output | Low-side gate driver output B for N-channel MOSFET gate connection. |+| 16 | SHB | bidirectional | High-side source pin B connected to high-side MOSFET source; VDS monitor input and gate driver sink current output. |+| 17 | GHB | output | High-side gate driver output B for N-channel MOSFET gate connection. |+| 18 | GHC | output | High-side gate driver output C for N-channel MOSFET gate connection. |+| 19 | SHC | bidirectional | High-side source pin C connected to high-side MOSFET source; VDS monitor input and gate driver sink current output. |+| 20 | GLC | output | Low-side gate driver output C for N-channel MOSFET gate connection. |+| 21 | SPC | input | Low-side shunt amplifier C input monitoring MOSFET source; connect to source and current sense resistor high side. |+| 22 | SNC | input | Current sense amplifier C input at low side of sense resistor; connect to PGND if CSA unused. |+| 23 | SOC | output | Current sense amplifier C output for current measurement; leave open if CSA unused. |+| 24 | SOB | output | Current sense amplifier B output for current measurement; leave open if CSA unused. |+| 25 | SOA | output | Current sense amplifier A output for current measurement; leave open if CSA unused. |+| 26 | VREF | power_in | Current sense amplifier power supply and reference voltage; connect X5R/X7R 0.1µF 6.3V capacitor to AGND. |+| 27 | DGND | power_in | Device digital ground connected to system ground. |+| 28 | nFAULT | tri_state | Fault indicator open-drain output pulled low during fault; requires external pull-up resistor. |+| 29 | SDO | tri_state | Serial data output open-drain on SCLK rising edge; requires external pull-up resistor for SPI interface. |+| 30 | SDI | input | Serial data input captured on SCLK falling edge for SPI interface. |+| 31 | SCLK | input | Serial clock input for SPI data capture on rising/falling edges. |+| 32 | nSCS | input | Serial chip select input; logic low enables SPI communication. |+| 33 | ENABLE | input | Gate driver enable input; logic low enters sleep mode; 8-40µs low pulse resets faults without sleep. |+| 34 | CAL | input | Amplifier calibration input; set high to short amplifier inputs and perform automatic offset voltage calibration. |+| 35 | AGND | power_in | Device analog ground connected to system ground; must be externally connected to BGND and PGND. |+| 36 | DVDD | power_in | 3.3V internal regulator output with 30mA available; connect X5R/X7R 1µF 6.3V capacitor to AGND. |+| 37 | INHA | input | High-side gate driver control input A for 6x PWM mode. |+| 38 | INLA | input | Low-side gate driver control input A for 6x PWM mode. |+| 39 | INHB | input | High-side gate driver control input B for 6x PWM mode. |+| 40 | INLB | input | Low-side gate driver control input B for 6x PWM mode. |+| 41 | INHC | input | High-side gate driver control input C for 6x PWM mode. |+| 42 | INLC | input | Low-side gate driver control input C for 6x PWM mode. |+| 43 | BGND | power_in | Buck regulator ground connected to system ground; must be externally connected to AGND and PGND. |+| 44 | CB | power_in | Buck regulator bootstrap capacitor input; connect X5R/X7R 0.1µF 16V capacitor between CB and SW. |+| 45 | SW | output | Buck regulator switch node connected to inductor, diode, and CB bootstrap capacitor. |+| 46 | NC | unconnected | No internal connection; pin may be left floating or connected to system ground. |+| 47 | VIN | power_in | Buck regulator power supply input; connect X5R/X7R VM-rated capacitor between VIN and BGND. |+| 48 | nSHDN | input | Buck regulator shutdown input; pull below 1.25V to disable, leave floating to enable; high-voltage tolerant with internal pull-up. |+| 49 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | VQFN-48-EP(7x7) |+| Category | Motor Driver ICs |+| Pins | 49 |++## CAD (KiCad official)++- Symbol: `DRV8323RSRGZT`+- Footprint: `Package_DFN_QFN:QFN-48-1EP_7x7mm_P0.5mm_EP5.15x5.15mm`+- 3D model: VQFN-48-EP(7x7) (KiCad packages3D, STEP)+- 3D model files: `drv8323rsrgzt-etched.step` / `drv8323rsrgzt-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `drv8323rsrgzt.step` / `drv8323rsrgzt.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/drv8323r) (98 pp, sha256 `9c4eee0ec7239000`, retrieved 2026-10-06, tier: lcsc)+- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-4-5-20251001` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/drv8323rsrgzt-datasheet.pdf)
page.jsonadded+406@@ -0,0 +1,406 @@+{+ "slug": "drv8323rsrgzt",+ "version": "0.1.0",+ "type": "component",+ "description": "Texas Instruments Brushless DC (BLDC) Motor Driver, VQFN-48-EP(7x7). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",+ "tags": [+ "component",+ "motor driver ics",+ "drv8323rsrgzt",+ "factory-2.0.0",+ "extractor-text"+ ],+ "dependencies": {},+ "hero": {+ "type": "image",+ "path": "docs/hero.png"+ },+ "files": [+ "page.json",+ "README.md",+ "drv8323rsrgzt.kicad_sym",+ "drv8323rsrgzt.kicad_mod",+ "drv8323rsrgzt.glb",+ "drv8323rsrgzt.step",+ "drv8323rsrgzt.lbr",+ "docs/hero.png",+ "docs/drv8323rsrgzt-datasheet.pdf",+ "viewers/symbol.html",+ "viewers/footprint.html",+ "drv8323rsrgzt-hero.glb",+ "drv8323rsrgzt-hero.overlay.json"+ ],+ "component": {+ "mpn": "DRV8323RSRGZT",+ "manufacturer": "Texas Instruments",+ "package": "VQFN-48-EP(7x7)",+ "pin_count": 49,+ "category": "Motor Driver ICs",+ "subcategory": "Brushless DC (BLDC) Motor Driver",+ "datasheet": "https://www.ti.com/cn/lit/gpn/drv8323r",+ "parts": {+ "symbol": "drv8323rsrgzt.kicad_sym",+ "footprint": "drv8323rsrgzt.kicad_mod",+ "model_3d": "drv8323rsrgzt-hero.glb",+ "model_3d_plain": "drv8323rsrgzt.glb",+ "model_3d_step": "drv8323rsrgzt-etched.step",+ "model_3d_step_plain": "drv8323rsrgzt.step",+ "lbr": "drv8323rsrgzt.lbr"+ },+ "distributor_links": {+ "lcsc": 2653553,+ "digikey": "296-46943-2-ND",+ "mouser": "595-DRV8323RSRGZT"+ },+ "distributor_check": {+ "checked_at": "2026-10-06T02:41:17Z",+ "source": "Component Ocean /api/assign-pns",+ "digikey": {+ "pn": "296-46943-2-ND",+ "status": "found"+ },+ "mouser": {+ "pn": "595-DRV8323RSRGZT",+ "status": "found"+ }+ },+ "pins": [+ {+ "number": "1",+ "name": "FB",+ "type": "input",+ "description": "Buck regulator feedback input for setting output voltage with external resistor divider."+ },+ {+ "number": "2",+ "name": "PGND",+ "type": "power_in",+ "description": "Device power ground and return path for low-side MOSFET gate drive current; must be connected externally to AGND and BGND."+ },+ {+ "number": "3",+ "name": "CPL",+ "type": "power_in",+ "description": "Charge pump switch node; connect X5R/X7R 47nF VM-rated capacitor between CPL and CPH."+ },+ {+ "number": "4",+ "name": "CPH",+ "type": "power_in",+ "description": "Charge pump switch node; connect X5R/X7R 47nF VM-rated capacitor between CPH and CPL."+ },+ {+ "number": "5",+ "name": "VCP",+ "type": "power_in",+ "description": "Charge pump output voltage; connect X5R/X7R 1µF 25V capacitor between VCP and VM."+ },+ {+ "number": "6",+ "name": "VM",+ "type": "power_in",+ "description": "Gate driver power supply input for motor power and VDRAIN connection; connect 0.1µF/≥10µF VM-rated capacitor to PGND."+ },+ {+ "number": "7",+ "name": "VDRAIN",+ "type": "input",+ "description": "High-side MOSFET drain sense input for VDS monitor at common drain point."+ },+ {+ "number": "8",+ "name": "GHA",+ "type": "output",+ "description": "High-side gate driver output A for N-channel MOSFET gate connection."+ },+ {+ "number": "9",+ "name": "SHA",+ "type": "bidirectional",+ "description": "High-side source pin connected to high-side MOSFET source; VDS monitor input and gate driver sink current output."+ },+ {+ "number": "10",+ "name": "GLA",+ "type": "output",+ "description": "Low-side gate driver output A for N-channel MOSFET gate connection."+ },+ {+ "number": "11",+ "name": "SPA",+ "type": "input",+ "description": "Low-side shunt amplifier input monitoring MOSFET source; connect to source and current sense resistor high side."+ },+ {+ "number": "12",+ "name": "SNA",+ "type": "input",+ "description": "Current sense amplifier A input at low side of sense resistor; connect to PGND if CSA unused."+ },+ {+ "number": "13",+ "name": "SNB",+ "type": "input",+ "description": "Current sense amplifier B input at low side of sense resistor; connect to PGND if CSA unused."+ },+ {+ "number": "14",+ "name": "SPB",+ "type": "input",+ "description": "Low-side shunt amplifier B input monitoring MOSFET source; connect to source and current sense resistor high side."+ },+ {+ "number": "15",+ "name": "GLB",+ "type": "output",+ "description": "Low-side gate driver output B for N-channel MOSFET gate connection."+ },+ {+ "number": "16",+ "name": "SHB",+ "type": "bidirectional",+ "description": "High-side source pin B connected to high-side MOSFET source; VDS monitor input and gate driver sink current output."+ },+ {+ "number": "17",+ "name": "GHB",+ "type": "output",+ "description": "High-side gate driver output B for N-channel MOSFET gate connection."+ },+ {+ "number": "18",+ "name": "GHC",+ "type": "output",+ "description": "High-side gate driver output C for N-channel MOSFET gate connection."+ },+ {+ "number": "19",+ "name": "SHC",+ "type": "bidirectional",+ "description": "High-side source pin C connected to high-side MOSFET source; VDS monitor input and gate driver sink current output."+ },+ {+ "number": "20",+ "name": "GLC",+ "type": "output",+ "description": "Low-side gate driver output C for N-channel MOSFET gate connection."+ },+ {+ "number": "21",+ "name": "SPC",+ "type": "input",+ "description": "Low-side shunt amplifier C input monitoring MOSFET source; connect to source and current sense resistor high side."+ },+ {+ "number": "22",+ "name": "SNC",+ "type": "input",+ "description": "Current sense amplifier C input at low side of sense resistor; connect to PGND if CSA unused."+ },+ {+ "number": "23",+ "name": "SOC",+ "type": "output",+ "description": "Current sense amplifier C output for current measurement; leave open if CSA unused."+ },+ {+ "number": "24",+ "name": "SOB",+ "type": "output",+ "description": "Current sense amplifier B output for current measurement; leave open if CSA unused."+ },+ {+ "number": "25",+ "name": "SOA",+ "type": "output",+ "description": "Current sense amplifier A output for current measurement; leave open if CSA unused."+ },+ {+ "number": "26",+ "name": "VREF",+ "type": "power_in",+ "description": "Current sense amplifier power supply and reference voltage; connect X5R/X7R 0.1µF 6.3V capacitor to AGND."+ },+ {+ "number": "27",+ "name": "DGND",+ "type": "power_in",+ "description": "Device digital ground connected to system ground."+ },+ {+ "number": "28",+ "name": "nFAULT",+ "type": "tri_state",+ "description": "Fault indicator open-drain output pulled low during fault; requires external pull-up resistor."+ },+ {+ "number": "29",+ "name": "SDO",+ "type": "tri_state",+ "description": "Serial data output open-drain on SCLK rising edge; requires external pull-up resistor for SPI interface."+ },+ {+ "number": "30",+ "name": "SDI",+ "type": "input",+ "description": "Serial data input captured on SCLK falling edge for SPI interface."+ },+ {+ "number": "31",+ "name": "SCLK",+ "type": "input",+ "description": "Serial clock input for SPI data capture on rising/falling edges."+ },+ {+ "number": "32",+ "name": "nSCS",+ "type": "input",+ "description": "Serial chip select input; logic low enables SPI communication."+ },+ {+ "number": "33",+ "name": "ENABLE",+ "type": "input",+ "description": "Gate driver enable input; logic low enters sleep mode; 8-40µs low pulse resets faults without sleep."+ },+ {+ "number": "34",+ "name": "CAL",+ "type": "input",+ "description": "Amplifier calibration input; set high to short amplifier inputs and perform automatic offset voltage calibration."+ },+ {+ "number": "35",+ "name": "AGND",+ "type": "power_in",+ "description": "Device analog ground connected to system ground; must be externally connected to BGND and PGND."+ },+ {+ "number": "36",+ "name": "DVDD",+ "type": "power_in",+ "description": "3.3V internal regulator output with 30mA available; connect X5R/X7R 1µF 6.3V capacitor to AGND."+ },+ {+ "number": "37",+ "name": "INHA",+ "type": "input",+ "description": "High-side gate driver control input A for 6x PWM mode."+ },+ {+ "number": "38",+ "name": "INLA",+ "type": "input",+ "description": "Low-side gate driver control input A for 6x PWM mode."+ },+ {+ "number": "39",+ "name": "INHB",+ "type": "input",+ "description": "High-side gate driver control input B for 6x PWM mode."+ },+ {+ "number": "40",+ "name": "INLB",+ "type": "input",+ "description": "Low-side gate driver control input B for 6x PWM mode."+ },+ {+ "number": "41",+ "name": "INHC",+ "type": "input",+ "description": "High-side gate driver control input C for 6x PWM mode."+ },+ {+ "number": "42",+ "name": "INLC",+ "type": "input",+ "description": "Low-side gate driver control input C for 6x PWM mode."+ },+ {+ "number": "43",+ "name": "BGND",+ "type": "power_in",+ "description": "Buck regulator ground connected to system ground; must be externally connected to AGND and PGND."+ },+ {+ "number": "44",+ "name": "CB",+ "type": "power_in",+ "description": "Buck regulator bootstrap capacitor input; connect X5R/X7R 0.1µF 16V capacitor between CB and SW."+ },+ {+ "number": "45",+ "name": "SW",+ "type": "output",+ "description": "Buck regulator switch node connected to inductor, diode, and CB bootstrap capacitor."+ },+ {+ "number": "46",+ "name": "NC",+ "type": "unconnected",+ "description": "No internal connection; pin may be left floating or connected to system ground."+ },+ {+ "number": "47",+ "name": "VIN",+ "type": "power_in",+ "description": "Buck regulator power supply input; connect X5R/X7R VM-rated capacitor between VIN and BGND."+ },+ {+ "number": "48",+ "name": "nSHDN",+ "type": "input",+ "description": "Buck regulator shutdown input; pull below 1.25V to disable, leave floating to enable; high-voltage tolerant with internal pull-up."+ },+ {+ "number": "49",+ "name": "EP",+ "type": "passive",+ "description": "Exposed pad (from the footprint; not named in the datasheet pin table)."+ }+ ],+ "provenance": {+ "extractor": "extract_pins 0.3",+ "factory_chain": {+ "factory": "2.0.0",+ "extractor": "extract_pins 0.3",+ "primary_model": "claude-haiku-4-5-20251001",+ "primary_mode": "text",+ "consensus_model": "claude-sonnet-5-5",+ "consensus": "agreed",+ "guards": "pin_guards 0.1: passed",+ "guard_notes": [+ "extractor flagged: SHA, SHB, SHC pins are bidirectional (gate driver output with sink current and VDS monitor input); v; SW pin is buck regulator switching output; verify if classification as standard output or tri_state ",+ "exposed pad 49 added from the footprint"+ ],+ "pages_sent": 57,+ "cost_usd": 0.5251,+ "at": "2026-10-06T02:41:00"+ },+ "datasheet": {+ "url": "https://www.ti.com/cn/lit/gpn/drv8323r",+ "pages": 98,+ "sha256": "9c4eee0ec7239000",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 49,+ "described": 49,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ }+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}