# DRV8313RHHR

**Texas Instruments** · Brushless DC (BLDC) Motor Driver · VQFN-36-EP(6x6)

DRV8313RHHR from Texas Instruments, in a VQFN-36-EP(6x6). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | EN1 | input | Channel enable. Logic high enables the 1/2-H bridge channel; internal pulldown |
| 2 | IN1 | input | Channel input. Logic high pulls 1/2-H bridge high, logic low pulls 1/2-H bridge low; no effect when ENx is low; internal pulldown input |
| 3 | GND | power_in | Device ground. Connect to system ground |
| 4 | NC | unconnected | No internal connection |
| 5 | CPL | power_in | Charge pump. Connect a VM-rated, 0.01-µF ceramic capacitor between CPH and CPL |
| 6 | CPH | power_in | Charge pump. Connect a VM-rated, 0.01-µF ceramic capacitor between CPH and CPL |
| 7 | VCP | power_in | Charge pump. Connect a 16-V, 0.1-µF ceramic capacitor to VM |
| 8 | NC | unconnected | No internal connection |
| 9 | VM | power_in | Power supply. Connect to motor supply voltage; bypass to GND with two 0.1-µF capacitors plus one bulk capacitor rated for VM |
| 10 | OUT1 | output | Half-H bridge output, connect to the load |
| 11 | PGND1 | power_in | Low-side FET source. Connect to GND or to low-side current-sense resistors |
| 12 | PGND2 | power_in | Low-side FET source. Connect to GND or to low-side current-sense resistors |
| 13 | OUT2 | output | Half-H bridge output, connect to the load |
| 14 | NC | unconnected | No internal connection |
| 15 | OUT3 | output | Half-H bridge output, connect to the load |
| 16 | PGND3 | power_in | Low-side FET source. Connect to GND or to low-side current-sense resistors |
| 17 | GND | power_in | Device ground. Connect to system ground |
| 18 | RSVD | unconnected | Reserved. Leave this pin disconnected |
| 19 | VM | power_in | Power supply. Connect to motor supply voltage; bypass to GND with two 0.1-µF capacitors plus one bulk capacitor rated for VM |
| 20 | GND | power_in | Device ground. Connect to system ground |
| 21 | COMPP | input | Comparator positive input. Uncommitted comparator input |
| 22 | COMPN | input | Comparator negative input. Uncommitted comparator input |
| 23 | GND | power_in | Device ground. Connect to system ground |
| 24 | GND | power_in | Device ground. Connect to system ground |
| 25 | V3P3 | power_in | Internal regulator. Internal supply voltage; bypass to GND with a 6.3-V, 0.47-µF ceramic capacitor; up to 10-mA external load |
| 26 | nRESET | input | Reset input. Active-low reset input initializes internal logic, clears faults, and disables the outputs; internal pulldown |
| 27 | nSLEEP | input | Sleep mode input. Logic high to enable device; logic low to enter low-power sleep mode; internal pulldown |
| 28 | nFAULT | tri_state | Fault indication pin. Pulled logic-low with fault condition; open-drain output requires an external pullup |
| 29 | nCOMPO | tri_state | Comparator output. Uncommitted comparator output; open drain requires an external pullup |
| 30 | GND | power_in | Device ground. Connect to system ground |
| 31 | GND | power_in | Device ground. Connect to system ground |
| 32 | GND | power_in | Device ground. Connect to system ground |
| 33 | EN3 | input | Channel enable. Logic high enables the 1/2-H bridge channel; internal pulldown |
| 34 | IN3 | input | Channel input. Logic high pulls 1/2-H bridge high, logic low pulls 1/2-H bridge low; no effect when ENx is low; internal pulldown input |
| 35 | EN2 | input | Channel enable. Logic high enables the 1/2-H bridge channel; internal pulldown |
| 36 | IN2 | input | Channel input. Logic high pulls 1/2-H bridge high, logic low pulls 1/2-H bridge low; no effect when ENx is low; internal pulldown input |
| 37 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | VQFN-36-EP(6x6) |
| Category | Motor Driver ICs |
| Pins | 37 |

## CAD (KiCad official)

- Symbol: `DRV8313RHHR`
- Footprint: `Package_DFN_QFN:QFN-36-1EP_6x6mm_P0.5mm_EP3.7x3.7mm`
- 3D model: VQFN-36-EP(6x6) (KiCad packages3D, STEP)
- Annotated 3D hero: `drv8313rhhr-hero.glb` (dashed pad outlines, silkscreen with pin 1, signal names; the [adom-hero standard](https://wiki.adom.inc/adom/component-hero)) is what the viewer shows. Downloads and EDA use the clean model, `drv8313rhhr-etched.glb`.
- 3D model files: `drv8313rhhr-etched.step` / `drv8313rhhr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `drv8313rhhr.step` / `drv8313rhhr.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/lit/ds/symlink/drv8313.pdf) (40 pp, sha256 `4edfefe04ca6ddb6`, retrieved 2026-09-26, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.2`, primary `claude-haiku-4-5-20251001` (text), consensus `claude-sonnet-4-6` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/drv8313rhhr-datasheet.pdf)