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DRV8306HRSMR
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Texas Instruments Brushless DC (BLDC) Motor Driver, VQFN-32-EP(4x4). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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README.mdadded+70@@ -0,0 +1,70 @@+# DRV8306HRSMR++**Texas Instruments** · Brushless DC (BLDC) Motor Driver · VQFN-32-EP(4x4)++DRV8306HRSMR from Texas Instruments, in a VQFN-32-EP(4x4). Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | CPH | passive | Charge-pump switching node requiring 22-nF VM-rated ceramic capacitor between CPH and CPL pins. |+| 2 | VCP | power_out | Charge pump output with 1-µF 16-V capacitor to VM supplying 7 to 11.5 V at 12-38 V input. |+| 3 | VM | power_in | Gate driver supply input from 6 to 38 V with 0.1-µF bypass and 10-µF bulk capacitance to PGND. |+| 4 | VDRAIN | input | High-side MOSFET drain sense input for VDS overcurrent monitoring from common drain point. |+| 5 | GHA | output | High-side gate driver A output connected to phase A MOSFET gate. |+| 6 | SHA | input | High-side source sense input A from phase A MOSFET source. |+| 7 | GLA | output | Low-side gate driver A output connected to phase A MOSFET gate. |+| 8 | ISEN | input | Low-side current sense input from sense resistor with 0.225 to 0.275 V cycle-by-cycle current limit threshold. |+| 9 | GLB | output | Low-side gate driver B output connected to phase B MOSFET gate. |+| 10 | SHB | input | High-side source sense input B from phase B MOSFET source. |+| 11 | GHB | output | High-side gate driver B output connected to phase B MOSFET gate. |+| 12 | GHC | output | High-side gate driver C output connected to phase C MOSFET gate. |+| 13 | SHC | input | High-side source sense input C from phase C MOSFET source. |+| 14 | GLC | output | Low-side gate driver C output connected to phase C MOSFET gate. |+| 15 | HPC | input | Hall element positive input C with 50 mV differential detection and 20 to 40 mV hysteresis. |+| 16 | HNC | input | Hall element negative input C with 50 mV differential detection and 20 to 40 mV hysteresis. |+| 17 | HPB | input | Hall element positive input B with 50 mV differential detection and 20 to 40 mV hysteresis. |+| 18 | HNB | input | Hall element negative input B with 50 mV differential detection and 20 to 40 mV hysteresis. |+| 19 | HPA | input | Hall element positive input A with 50 mV differential detection and 20 to 40 mV hysteresis. |+| 20 | HNA | input | Hall element negative input A with 50 mV differential detection and 20 to 40 mV hysteresis. |+| 21 | nFAULT | tri_state | Open-drain fault indicator output pulled to logic low during VM UVLO, CPUV, VDS overcurrent, gate driver fault, or thermal shutdown conditions. |+| 22 | IDRIVE | input | Gate drive current setting as 7-level resistor-configured input from 15 mA to 150 mA source and 30 mA to 300 mA sink. |+| 23 | VDS | input | VDS overcurrent monitor trip threshold setting as 7-level resistor-configured input from 0.15 V to 1.8 V. |+| 24 | ENABLE | input | Gate driver enable input entering low-power sleep mode when logic low with 15 to 40-µs reset pulse for fault recovery. |+| 25 | AGND | power_in | Device analog ground connection to system ground. |+| 26 | DVDD | power_out | 3.3-V regulated output from internal LDO with 1-µF 6.3-V bypass capacitor sourcing 30 mA maximum external load current. |+| 27 | PWM | input | PWM input for trapezoidal commutation motor control from 0 to 5.5 V logic level supporting 100% duty cycle. |+| 28 | FGOUT | tri_state | Open-drain commutation frequency output signal derived from all three Hall sensor inputs for closed-loop speed control. |+| 29 | DIR | input | Motor direction selection input for clockwise or counterclockwise rotation with internal 100 kΩ pulldown resistor. |+| 30 | nBRAKE | input | Motor brake activation input pulled low to brake motor by disabling high-side and enabling low-side MOSFETs with internal pulldown. |+| 31 | PGND | power_in | Device power ground connection to system ground with 0.1-µF bypass capacitor to VM. |+| 32 | CPL | passive | Charge-pump switching node requiring 22-nF VM-rated ceramic capacitor between CPH and CPL pins. |+| 33 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | VQFN-32-EP(4x4) |+| Category | Motor Driver ICs |+| Pins | 33 |++## CAD (KiCad official)++- Symbol: `DRV8306HRSMR`+- Footprint: `Package_DFN_QFN:QFN-32-1EP_4x4mm_P0.4mm_EP2.9x2.9mm`+- 3D model: VQFN-32-EP(4x4) (KiCad packages3D, STEP)+- 3D model files: `drv8306hrsmr-etched.step` / `drv8306hrsmr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `drv8306hrsmr.step` / `drv8306hrsmr.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/drv8306) (47 pp, sha256 `5a55fde42c409c8a`, retrieved 2026-09-17, tier: lcsc)+- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.2`, primary `claude-haiku-4-5-20251001` (text), consensus `claude-sonnet-4-6` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/drv8306hrsmr-datasheet.pdf)
page.jsonadded+294@@ -0,0 +1,294 @@+{+ "slug": "drv8306hrsmr",+ "version": "0.1.0",+ "type": "component",+ "description": "Texas Instruments Brushless DC (BLDC) Motor Driver, VQFN-32-EP(4x4). Datasheet-verified pinout, KiCad symbol/footprint/3D.",+ "tags": [+ "component",+ "motor driver ics",+ "drv8306hrsmr",+ "factory-2.0.0",+ "extractor-text"+ ],+ "dependencies": {},+ "hero": {+ "type": "image",+ "path": "docs/hero.png"+ },+ "files": [+ "page.json",+ "README.md",+ "drv8306hrsmr.kicad_sym",+ "drv8306hrsmr.kicad_mod",+ "drv8306hrsmr.glb",+ "drv8306hrsmr.step",+ "drv8306hrsmr.lbr",+ "docs/hero.png",+ "docs/drv8306hrsmr-datasheet.pdf",+ "viewers/symbol.html",+ "viewers/footprint.html"+ ],+ "component": {+ "mpn": "DRV8306HRSMR",+ "manufacturer": "Texas Instruments",+ "package": "VQFN-32-EP(4x4)",+ "pin_count": 33,+ "category": "Motor Driver ICs",+ "subcategory": "Brushless DC (BLDC) Motor Driver",+ "datasheet": "https://www.ti.com/cn/lit/gpn/drv8306",+ "parts": {+ "symbol": "drv8306hrsmr.kicad_sym",+ "footprint": "drv8306hrsmr.kicad_mod",+ "model_3d": "drv8306hrsmr-etched.glb",+ "model_3d_plain": "drv8306hrsmr.glb",+ "model_3d_step": "drv8306hrsmr-etched.step",+ "model_3d_step_plain": "drv8306hrsmr.step",+ "lbr": "drv8306hrsmr.lbr"+ },+ "distributor_links": {+ "lcsc": "C2150572"+ },+ "pins": [+ {+ "number": "1",+ "name": "CPH",+ "type": "passive",+ "description": "Charge-pump switching node requiring 22-nF VM-rated ceramic capacitor between CPH and CPL pins."+ },+ {+ "number": "2",+ "name": "VCP",+ "type": "power_out",+ "description": "Charge pump output with 1-µF 16-V capacitor to VM supplying 7 to 11.5 V at 12-38 V input."+ },+ {+ "number": "3",+ "name": "VM",+ "type": "power_in",+ "description": "Gate driver supply input from 6 to 38 V with 0.1-µF bypass and 10-µF bulk capacitance to PGND."+ },+ {+ "number": "4",+ "name": "VDRAIN",+ "type": "input",+ "description": "High-side MOSFET drain sense input for VDS overcurrent monitoring from common drain point."+ },+ {+ "number": "5",+ "name": "GHA",+ "type": "output",+ "description": "High-side gate driver A output connected to phase A MOSFET gate."+ },+ {+ "number": "6",+ "name": "SHA",+ "type": "input",+ "description": "High-side source sense input A from phase A MOSFET source."+ },+ {+ "number": "7",+ "name": "GLA",+ "type": "output",+ "description": "Low-side gate driver A output connected to phase A MOSFET gate."+ },+ {+ "number": "8",+ "name": "ISEN",+ "type": "input",+ "description": "Low-side current sense input from sense resistor with 0.225 to 0.275 V cycle-by-cycle current limit threshold."+ },+ {+ "number": "9",+ "name": "GLB",+ "type": "output",+ "description": "Low-side gate driver B output connected to phase B MOSFET gate."+ },+ {+ "number": "10",+ "name": "SHB",+ "type": "input",+ "description": "High-side source sense input B from phase B MOSFET source."+ },+ {+ "number": "11",+ "name": "GHB",+ "type": "output",+ "description": "High-side gate driver B output connected to phase B MOSFET gate."+ },+ {+ "number": "12",+ "name": "GHC",+ "type": "output",+ "description": "High-side gate driver C output connected to phase C MOSFET gate."+ },+ {+ "number": "13",+ "name": "SHC",+ "type": "input",+ "description": "High-side source sense input C from phase C MOSFET source."+ },+ {+ "number": "14",+ "name": "GLC",+ "type": "output",+ "description": "Low-side gate driver C output connected to phase C MOSFET gate."+ },+ {+ "number": "15",+ "name": "HPC",+ "type": "input",+ "description": "Hall element positive input C with 50 mV differential detection and 20 to 40 mV hysteresis."+ },+ {+ "number": "16",+ "name": "HNC",+ "type": "input",+ "description": "Hall element negative input C with 50 mV differential detection and 20 to 40 mV hysteresis."+ },+ {+ "number": "17",+ "name": "HPB",+ "type": "input",+ "description": "Hall element positive input B with 50 mV differential detection and 20 to 40 mV hysteresis."+ },+ {+ "number": "18",+ "name": "HNB",+ "type": "input",+ "description": "Hall element negative input B with 50 mV differential detection and 20 to 40 mV hysteresis."+ },+ {+ "number": "19",+ "name": "HPA",+ "type": "input",+ "description": "Hall element positive input A with 50 mV differential detection and 20 to 40 mV hysteresis."+ },+ {+ "number": "20",+ "name": "HNA",+ "type": "input",+ "description": "Hall element negative input A with 50 mV differential detection and 20 to 40 mV hysteresis."+ },+ {+ "number": "21",+ "name": "nFAULT",+ "type": "tri_state",+ "description": "Open-drain fault indicator output pulled to logic low during VM UVLO, CPUV, VDS overcurrent, gate driver fault, or thermal shutdown conditions."+ },+ {+ "number": "22",+ "name": "IDRIVE",+ "type": "input",+ "description": "Gate drive current setting as 7-level resistor-configured input from 15 mA to 150 mA source and 30 mA to 300 mA sink."+ },+ {+ "number": "23",+ "name": "VDS",+ "type": "input",+ "description": "VDS overcurrent monitor trip threshold setting as 7-level resistor-configured input from 0.15 V to 1.8 V."+ },+ {+ "number": "24",+ "name": "ENABLE",+ "type": "input",+ "description": "Gate driver enable input entering low-power sleep mode when logic low with 15 to 40-µs reset pulse for fault recovery."+ },+ {+ "number": "25",+ "name": "AGND",+ "type": "power_in",+ "description": "Device analog ground connection to system ground."+ },+ {+ "number": "26",+ "name": "DVDD",+ "type": "power_out",+ "description": "3.3-V regulated output from internal LDO with 1-µF 6.3-V bypass capacitor sourcing 30 mA maximum external load current."+ },+ {+ "number": "27",+ "name": "PWM",+ "type": "input",+ "description": "PWM input for trapezoidal commutation motor control from 0 to 5.5 V logic level supporting 100% duty cycle."+ },+ {+ "number": "28",+ "name": "FGOUT",+ "type": "tri_state",+ "description": "Open-drain commutation frequency output signal derived from all three Hall sensor inputs for closed-loop speed control."+ },+ {+ "number": "29",+ "name": "DIR",+ "type": "input",+ "description": "Motor direction selection input for clockwise or counterclockwise rotation with internal 100 kΩ pulldown resistor."+ },+ {+ "number": "30",+ "name": "nBRAKE",+ "type": "input",+ "description": "Motor brake activation input pulled low to brake motor by disabling high-side and enabling low-side MOSFETs with internal pulldown."+ },+ {+ "number": "31",+ "name": "PGND",+ "type": "power_in",+ "description": "Device power ground connection to system ground with 0.1-µF bypass capacitor to VM."+ },+ {+ "number": "32",+ "name": "CPL",+ "type": "passive",+ "description": "Charge-pump switching node requiring 22-nF VM-rated ceramic capacitor between CPH and CPL pins."+ },+ {+ "number": "33",+ "name": "EP",+ "type": "passive",+ "description": "Exposed pad (from the footprint; not named in the datasheet pin table)."+ }+ ],+ "provenance": {+ "extractor": "extract_pins 0.2",+ "factory_chain": {+ "factory": "2.0.0",+ "extractor": "extract_pins 0.2",+ "primary_model": "claude-haiku-4-5-20251001",+ "primary_mode": "text",+ "consensus_model": "claude-sonnet-4-6",+ "consensus": "agreed",+ "guards": "pin_guards 0.1: passed",+ "guard_notes": [+ "extractor flagged: Thermal pad (exposed pad on bottom of QFN package) is not assigned a numerical pin designation in th",+ "exposed pad 33 added from the footprint"+ ],+ "pages_sent": 47,+ "cost_usd": 0.5004,+ "at": "2026-09-17T21:33:01"+ },+ "datasheet": {+ "url": "https://www.ti.com/cn/lit/gpn/drv8306",+ "pages": 47,+ "sha256": "5a55fde42c409c8a",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 33,+ "described": 33,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ }+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}