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Set visibility: public

Ray ·afcf3ad081 ·5d ago ·parent e97fa7e
1 file changed +9−6
page.json+9−6
@@ -65,13 +65,13 @@         "number": "3",         "name": "VCP",         "type": "power_in",-        "description": "Charge pump output; connect X5R or X7R 1-\u00b5F 16-V ceramic capacitor between VCP and VM pins."+        "description": "Charge pump output; connect X5R or X7R 1-µF 16-V ceramic capacitor between VCP and VM pins."       },       {         "number": "4",         "name": "VM",         "type": "power_in",-        "description": "Gate driver power supply input for 6 to 38 V bridge power supply; connect X5R or X7R 0.1-\u00b5F VM-rated ceramic and \u226510-\u00b5F local capacitance between VM and PGND pins."+        "description": "Gate driver power supply input for 6 to 38 V bridge power supply; connect X5R or X7R 0.1-µF VM-rated ceramic and ≥10-µF local capacitance between VM and PGND pins."       },       {         "number": "5",@@ -191,7 +191,7 @@         "number": "24",         "name": "VREF",         "type": "power_in",-        "description": "Shunt amplifier power supply input and reference; connect X5R or X7R 0.1-\u00b5F 6.3-V ceramic capacitor between VREF and AGND pins."+        "description": "Shunt amplifier power supply input and reference; connect X5R or X7R 0.1-µF 6.3-V ceramic capacitor between VREF and AGND pins."       },       {         "number": "25",@@ -227,7 +227,7 @@         "number": "30",         "name": "ENABLE",         "type": "input",-        "description": "Gate driver enable; logic low enters low power sleep mode; 5 to 32-\u00b5s low pulse can reset fault conditions."+        "description": "Gate driver enable; logic low enters low power sleep mode; 5 to 32-µs low pulse can reset fault conditions."       },       {         "number": "31",@@ -245,7 +245,7 @@         "number": "33",         "name": "DVDD",         "type": "power_in",-        "description": "3.3-V internal regulator output sourcing up to 30 mA externally; connect X5R or X7R 1-\u00b5F 6.3-V ceramic capacitor between DVDD and AGND pins."+        "description": "3.3-V internal regulator output sourcing up to 30 mA externally; connect X5R or X7R 1-µF 6.3-V ceramic capacitor between DVDD and AGND pins."       },       {         "number": "34",@@ -373,5 +373,8 @@     "docs/drv8304hrhat-datasheet.pdf",     "viewers/symbol.html",     "viewers/footprint.html"-  ]+  ],+  "visibility": {+    "public": true+  } }\ No newline at end of file