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DRV8300UDRGER

Public Made by Adom

by adom

Texas Instruments Gate Drivers, VQFN-24(4x4). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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DRV8300UDRGER

Texas Instruments · Gate Drivers · VQFN-24(4x4)

DRV8300UDRGER from Texas Instruments, in a VQFN-24(4x4). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 INLA input Low-side gate driver control input that controls the output of the low-side gate driver.
2 INLB input Low-side gate driver control input that controls the output of the low-side gate driver.
3 INLC input Low-side gate driver control input that controls the output of the low-side gate driver.
4 GVDD power_in Gate driver power supply input, rated 8.7-20V; connect X5R or X7R ceramic capacitor ≥10µF between GVDD and GND.
5 MODE input Mode input controls polarity of GLx compared to INLx inputs; floating for non-inverted, connected to GVDD for inverted.
6 GND power_in Device ground.
7 NC unconnected No internal connection; pin can be left floating or connected to system ground.
8 NC unconnected No internal connection; pin can be left floating or connected to system ground.
9 GLC output Low-side gate driver output connected to the gate of the low-side power MOSFET.
10 GLB output Low-side gate driver output connected to the gate of the low-side power MOSFET.
11 GLA output Low-side gate driver output connected to the gate of the low-side power MOSFET.
12 SHC input High-side source sense input connected to the high-side power MOSFET source.
13 GHC output High-side gate driver output connected to the gate of the high-side power MOSFET.
14 BSTC output Bootstrap output pin; connect capacitor between BSTC and SHC.
15 SHB input High-side source sense input connected to the high-side power MOSFET source.
16 GHB output High-side gate driver output connected to the gate of the high-side power MOSFET.
17 BSTB output Bootstrap output pin; connect capacitor between BSTB and SHB.
18 SHA input High-side source sense input connected to the high-side power MOSFET source.
19 GHA output High-side gate driver output connected to the gate of the high-side power MOSFET.
20 BSTA output Bootstrap output pin; connect capacitor between BSTA and SHA.
21 DT input Deadtime input pin; connect resistor to ground for variable deadtime, fixed deadtime when left floating.
22 INHA input High-side gate driver control input that controls the output of the high-side gate driver.
23 INHB input High-side gate driver control input that controls the output of the high-side gate driver.
24 INHC input High-side gate driver control input that controls the output of the high-side gate driver.
25 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package VQFN-24(4x4)
Category Motor Driver ICs
Pins 25

CAD (KiCad official)

  • Symbol: DRV8300UDRGER
  • Footprint: Package_DFN_QFN:QFN-24-1EP_4x4mm_P0.5mm_EP2.6x2.6mm
  • 3D model: VQFN-24(4x4) (KiCad packages3D, STEP)
  • 3D model files: drv8300udrger-etched.step / drv8300udrger-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); drv8300udrger.step / drv8300udrger.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (33 pp, sha256 3d03d954bf1ffe88, retrieved 2026-10-03, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF