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DRV8300DIPWR
Public Made by Adomby adom
Texas Instruments Gate Drivers, TSSOP-20. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownDRV8300DIPWR
Texas Instruments · Gate Drivers · TSSOP-20
DRV8300DIPWR from Texas Instruments, in a TSSOP-20. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | INHA | input | High-side gate driver control input for phase A; rated 0 to VGVDD logic levels. |
| 2 | INHB | input | High-side gate driver control input for phase B; rated 0 to VGVDD logic levels. |
| 3 | INHC | input | High-side gate driver control input for phase C; rated 0 to VGVDD logic levels. |
| 4 | INLA | input | Low-side gate driver control input for phase A; provides inverted output polarity to GLA in DRV8300DI variant. |
| 5 | INLB | input | Low-side gate driver control input for phase B; provides inverted output polarity to GLB in DRV8300DI variant. |
| 6 | INLC | input | Low-side gate driver control input for phase C; provides inverted output polarity to GLC in DRV8300DI variant. |
| 7 | GVDD | power_in | Gate driver power supply input, rated 5 to 20 V; requires 10 µF bypass capacitor to GND. |
| 8 | GND | power_in | Device ground reference. |
| 9 | GLC | output | Low-side gate driver output for phase C; provides 750 mA peak source and 1.5 A peak sink current. |
| 10 | GLB | output | Low-side gate driver output for phase B; provides 750 mA peak source and 1.5 A peak sink current. |
| 11 | GLA | output | Low-side gate driver output for phase A; provides 750 mA peak source and 1.5 A peak sink current. |
| 12 | SHC | input | High-side source sense input for phase C, connected to high-side MOSFET source; rated -22 to 110 V. |
| 13 | GHC | output | High-side gate driver output for phase C; provides 750 mA peak source and 1.5 A peak sink current, rated -22 to 125 V absolute maximum. |
| 14 | BSTC | output | Bootstrap voltage output for phase C; connect capacitor between BSTC and SHC for high-side gate drive supply. |
| 15 | SHB | input | High-side source sense input for phase B, connected to high-side MOSFET source; rated -22 to 110 V. |
| 16 | GHB | output | High-side gate driver output for phase B; provides 750 mA peak source and 1.5 A peak sink current, rated -22 to 125 V absolute maximum. |
| 17 | BSTB | output | Bootstrap voltage output for phase B; connect capacitor between BSTB and SHB for high-side gate drive supply. |
| 18 | SHA | input | High-side source sense input for phase A, connected to high-side MOSFET source; rated -22 to 110 V. |
| 19 | GHA | output | High-side gate driver output for phase A; provides 750 mA peak source and 1.5 A peak sink current, rated -22 to 125 V absolute maximum. |
| 20 | BSTA | output | Bootstrap voltage output for phase A; connect capacitor between BSTA and SHA for high-side gate drive supply. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | TSSOP-20 |
| Category | Motor Driver ICs |
| Pins | 20 |
CAD (KiCad official)
- Symbol:
DRV8300DIPWR - Footprint:
Package_SO:TSSOP-20_4.4x6.5mm_P0.65mm - 3D model: TSSOP-20 (KiCad packages3D, STEP)
- 3D model files:
drv8300dipwr-etched.step/drv8300dipwr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);drv8300dipwr.step/drv8300dipwr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (35 pp, sha256
ce0cba4354bb3566, retrieved 2026-09-27, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.2, primaryclaude-haiku-4-5-20251001(text), consensusclaude-sonnet-4-6(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).