component
DRV8143PQDGQRQ1
Public Made by Adomby adom
Texas Instruments Brushed DC Motor Drivers, HTSSOP-28. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownDRV8143PQDGQRQ1
Texas Instruments · Brushed DC Motor Drivers · HTSSOP-28
DRV8143PQDGQRQ1 from Texas Instruments, in a HTSSOP-28. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | SCLK | input | SPI serial clock input; SDI is captured at its falling edge and SDO is updated at its rising edge. |
| 2 | nSCS | input | SPI chip select; an active-low level on this pin enables serial interface communication. |
| 3 | IN | input | Controller input pin for bridge operation; see the Bridge Control section. |
| 4 | DRVOFF | input | Controller input pin for bridge Hi-Z; see the Bridge Control section. |
| 5 | VCP | power_out | Charge pump pin for the storage capacitor; connect a 6.3 V, 1 µF capacitor to the VM supply. |
| 6 | VM | power_in | Motor supply voltage; must be combined with the other five VM pins to support device current capability and bypassed to GND with a 0.1 µF ceramic capacitor plus a bulk capacitor. |
| 7 | VM | power_in | Motor supply voltage; must be combined with the other five VM pins to support device current capability and bypassed to GND with a 0.1 µF ceramic capacitor plus a bulk capacitor. |
| 8 | VM | power_in | Motor supply voltage; must be combined with the other five VM pins to support device current capability and bypassed to GND with a 0.1 µF ceramic capacitor plus a bulk capacitor. |
| 9 | OUT | power_out | Half-bridge output to the motor or load; must be combined with the other five OUT pins to support device current capability. |
| 10 | OUT | power_out | Half-bridge output to the motor or load; must be combined with the other five OUT pins to support device current capability. |
| 11 | OUT | power_out | Half-bridge output to the motor or load; must be combined with the other five OUT pins to support device current capability. |
| 12 | GND | power_in | Ground pin; must be combined with the other five GND pins to support device current capability. |
| 13 | GND | power_in | Ground pin; must be combined with the other five GND pins to support device current capability. |
| 14 | GND | power_in | Ground pin; must be combined with the other five GND pins to support device current capability. |
| 15 | GND | power_in | Ground pin; must be combined with the other five GND pins to support device current capability. |
| 16 | GND | power_in | Ground pin; must be combined with the other five GND pins to support device current capability. |
| 17 | GND | power_in | Ground pin; must be combined with the other five GND pins to support device current capability. |
| 18 | OUT | power_out | Half-bridge output to the motor or load; must be combined with the other five OUT pins to support device current capability. |
| 19 | OUT | power_out | Half-bridge output to the motor or load; must be combined with the other five OUT pins to support device current capability. |
| 20 | OUT | power_out | Half-bridge output to the motor or load; must be combined with the other five OUT pins to support device current capability. |
| 21 | VM | power_in | Motor supply voltage; must be combined with the other five VM pins to support device current capability and bypassed to GND with a 0.1 µF ceramic capacitor plus a bulk capacitor. |
| 22 | VM | power_in | Motor supply voltage; must be combined with the other five VM pins to support device current capability and bypassed to GND with a 0.1 µF ceramic capacitor plus a bulk capacitor. |
| 23 | VM | power_in | Motor supply voltage; must be combined with the other five VM pins to support device current capability and bypassed to GND with a 0.1 µF ceramic capacitor plus a bulk capacitor. |
| 24 | VDD | power_in | Logic power supply to the device. |
| 25 | IPROPI | bidirectional | Driver load current analog feedback; see the IPROPI section of Device Configuration. |
| 26 | nFAULT | output | Open-drain fault indication to the controller; see the nFAULT section of Device Configuration. |
| 27 | SDO | output | SPI serial data output (push-pull); data is updated at the rising edge of SCLK. |
| 28 | SDI | input | SPI serial data input; data is captured at the falling edge of SCLK. |
| 29 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | HTSSOP-28 |
| Category | Motor Driver ICs |
| Pins | 29 |
CAD (KiCad official)
- Symbol:
DRV8143PQDGQRQ1 - Footprint:
Package_SO:TSSOP-28-1EP_4.4x9.7mm_P0.65mm_EP2.85x6.7mm - 3D model: HTSSOP-28 (KiCad packages3D, STEP)
- 3D model files:
drv8143pqdgqrq1-etched.step/drv8143pqdgqrq1-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);drv8143pqdgqrq1.step/drv8143pqdgqrq1.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (71 pp, sha256
66959cc6e8f9728b, retrieved 2026-10-12, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).