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Contents

README

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DRV612RGTR

Texas Instruments · Audio Power OpAmps · VQFN-16(3x3)

DRV612RGTR from Texas Instruments, in a VQFN-16(3x3). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 OUT_L output Left-channel single-ended line output, rated ±8-kV HBM ESD-protected on the RGT package (pins 1 and 12).
2 GND power_in Ground connection for the device.
3 GND power_in Ground connection for the device.
4 MUTE input Active-low mute control; VIL is 38% to 43% of VDD and VIH is 57% to 66% of VDD per the recommended operating conditions.
5 VSS power_out Charge-pump negative supply voltage generated by the device, which the datasheet lists as a change pump negative supply output.
6 CN bidirectional Charge-pump flying capacitor negative connection.
7 NC unconnected No internal connection.
8 CP bidirectional Charge-pump flying capacitor positive connection.
9 VDD power_in Supply voltage input; 3 V to 3.6 V DC with 3.3 V nominal per the recommended operating conditions.
10 GND power_in Ground connection for the device.
11 GAIN input Gain-set programming pin; connect a single resistor to ground, with values per Table 2 of the datasheet, to select one of 13 internal gain settings.
12 OUT_R output Right-channel single-ended line output, rated ±8-kV HBM ESD-protected on the RGT package (pins 1 and 12).
13 -IN_R input Negative input for the right channel.
14 NC unconnected No internal connection.
15 NC unconnected No internal connection.
16 -IN_L input Negative input for the left channel.
17 Thermal Pad passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package VQFN-16(3x3)
Category Operational Amplifier/Comparator
Pins 17

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply voltage, DC VDD 3 3.3 3.6 V 4
Load resistance RL 600 10000 Ω 4
Low-level input voltage, MUTE VIL 38 40 43 %VDD 4
High-level input voltage, MUTE VIH 57 60 66 %VDD 4
Free-air temperature TA 0 25 85 °C 4
VDD to GND VDD -0.3 4 V 4
Maximum operating junction temperature TJ -40 150 °C 4
Storage temperature Tstg -65 150 °C 4
Junction-to-ambient thermal resistance (RGT, VQFN-16) RθJA 52 °C/W RGT (16-pin VQFN) package 4
Junction-to-case (top) thermal resistance (RGT, VQFN-16) RθJC(top) 71 °C/W RGT (16-pin VQFN) package 4
Junction-to-board thermal resistance (RGT, VQFN-16) RθJB 26 °C/W RGT (16-pin VQFN) package 4
Junction-to-top characterization parameter (RGT, VQFN-16) ψJT 3 °C/W RGT (16-pin VQFN) package 4
Junction-to-board characterization parameter (RGT, VQFN-16) ψJB 26 °C/W RGT (16-pin VQFN) package 4
Power-supply rejection ratio PSRR 70 80 dB 5
Output offset voltage /VOS/ 0.5 1 mV VDD = 3.3 V, input ac-coupled 5
Output impedance when muted Zo 0.07 1 Ω MUTE = GND 5
High-level output voltage VOH 3.1 V VDD = 3.3 V 5
Low-level output voltage VOL -3.05 V VDD = 3.3 V 5
VDD undervoltage detection Vuvp_on 2.8 V 5
VDD undervoltage detection, hysteresis Vuvp_hysteresis 200 mV 5
Charge-pump switching frequency FCP 350 kHz 5
High-level input current, MUTE /IIH/ 1 µA VDD = 3.3 V, VIH = VDD 5
Low-level input current, MUTE /IIL/ 1 µA VDD = 3.3 V, VIL = 0 V 5
Supply current, no load I(VDD) 18 mA VDD, MUTE = 3.3 V 5
Supply current, MUTED 18 mA VDD = 3.3 V, MUTE = GND 5
Thermal shutdown TSD 150 °C 5
Thermal shutdown hysteresis 15 °C 5
Output voltage, outputs in phase VO 2.2 Vrms 1% THD+N, f = 1 kHz, 10-kΩ load 5
Total harmonic distortion plus noise THD+N 0.007 % f = 1 kHz, 10-kΩ load, VO = 2 Vrms 5
Signal-to-noise ratio SNR 105 dB A-weighted, AES17 filter, 2 Vrms ref 5
Dynamic range DNR 105 dB A-weighted, AES17 filter, 2 Vrms ref 5
Noise voltage Vn 12 µV A-weighted, AES17 filter 5
Input-to-output attenuation when muted 80 dB 1 Vrms, 1-kHz input 5
Slew rate 4.5 V/µs 5
Unity-gain bandwidth GBW 8 MHz 5
Crosstalk, line L-R and R-L -91 dB 10-kΩ load, VO = 2 Vrms 5
Current limit Ilimit 25 mA VDD = 3.3 V 5
Gain matching, left vs right channels ΔAV 0.25 dB Between left and right channels 6
Gain step tolerance 0.1 dB 6

CAD (KiCad official)

  • Symbol: DRV612RGTR
  • Footprint: Package_DFN_QFN:QFN-16-1EP_3x3mm_P0.5mm_EP1.7x1.7mm
  • 3D model: VQFN-16(3x3) (KiCad packages3D, STEP)
  • 3D model files: drv612rgtr-etched.step / drv612rgtr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); drv612rgtr.step / drv612rgtr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (31 pp, sha256 eb48cdae517fb545, retrieved 2026-10-29, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF