DP83TG720SWRHARQ1

{
  "slug": "dp83tg720swrharq1",
  "version": "0.1.0",
  "type": "component",
  "description": "Texas Instruments Ethernet Transceivers, QFN-36-EP(6x6). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "tags": [
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    "interface",
    "dp83tg720swrharq1",
    "factory-2.0.0",
    "extractor-text"
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  "component": {
    "mpn": "DP83TG720SWRHARQ1",
    "manufacturer": "Texas Instruments",
    "package": "QFN-36-EP(6x6)",
    "pin_count": 37,
    "category": "Interface",
    "subcategory": "Ethernet Transceivers",
    "datasheet": "https://www.ti.com/cn/lit/gpn/dp83tg720s-q1",
    "parts": {
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      "lbr": "dp83tg720swrharq1.lbr"
    },
    "distributor_links": {
      "lcsc": "C2921292",
      "digikey": "296-DP83TG720SWRHARQ1TR-ND",
      "mouser": "595-P83TG720SWRHARQ1"
    },
    "distributor_check": {
      "checked_at": "2026-10-12T11:06:39Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": "296-DP83TG720SWRHARQ1TR-ND",
        "status": "found",
        "lifecycle": "Active"
      },
      "mouser": {
        "pn": "595-P83TG720SWRHARQ1",
        "status": "found"
      }
    },
    "pins": [
      {
        "number": "1",
        "name": "MDC",
        "type": "input",
        "description": "Management data clock that synchronizes MDIO transfers; it may be stopped by the external management entity when the bus is idle, and the datasheet gives an MDC frequency of 2.5 to 20 MHz at 25 pF load."
      },
      {
        "number": "2",
        "name": "INT_N",
        "type": "output",
        "description": "Active-low interrupt output with weak internal pull-up (open-drain); it stays low until the interrupt flag is cleared by register access, and can be made active-high through register 0x0011."
      },
      {
        "number": "3",
        "name": "RESET_N",
        "type": "input",
        "description": "Active-low reset input with internal pull-up that must be held low for at least 10 µs to force reset; strap pins are re-sampled when it is released."
      },
      {
        "number": "4",
        "name": "XO",
        "type": "output",
        "description": "Reference clock output used only with a crystal across XI and XO; it is left unconnected when a CMOS-level oscillator drives XI."
      },
      {
        "number": "5",
        "name": "XI",
        "type": "input",
        "description": "Reference clock input for a 25 MHz ±100 ppm crystal or CMOS-level oscillator, with VIH of 1.3 V minimum and VIL of 0.5 V maximum."
      },
      {
        "number": "6",
        "name": "LED_1 / GPIO_1",
        "type": "bidirectional",
        "description": "LED_1 indicates link status and blinks on TX/RX activity; it is a strap pin with internal pull-down of 9 kΩ (typical) and can be reconfigured as GPIO_1."
      },
      {
        "number": "7",
        "name": "VSLEEP",
        "type": "power_in",
        "description": "Sleep-domain supply of 3.3 V (2.97 V to 3.63 V); connect it to VDDA3P3 if sleep mode is not used."
      },
      {
        "number": "8",
        "name": "WAKE",
        "type": "input",
        "description": "Active-high local wake input in the VSLEEP domain that wakes the PHY from sleep, with internal pull-down of 50 kΩ (typical); it may be tied directly to VSLEEP if sleep is unused."
      },
      {
        "number": "9",
        "name": "VDD1P0",
        "type": "power_in",
        "description": "1.0 V core supply (0.95 V to 1.1 V); see the datasheet decoupling recommendations."
      },
      {
        "number": "10",
        "name": "INH",
        "type": "output",
        "description": "Active-high PMOS open-drain output that is released in sleep so an external 10 kΩ pull-down can pull the line to ground, and otherwise drives high to the VSLEEP rail."
      },
      {
        "number": "11",
        "name": "VDDA3P3",
        "type": "power_in",
        "description": "3.3 V core analog supply (2.97 V to 3.63 V); see the datasheet decoupling recommendations."
      },
      {
        "number": "12",
        "name": "TRD_P",
        "type": "bidirectional",
        "description": "Positive leg of the 1000BASE-T1 differential MDI pair, which is rated -0.5 V to 4 V and must be ESD-protected and coupled through the common-mode network per the layout guidance."
      },
      {
        "number": "13",
        "name": "TRD_M",
        "type": "bidirectional",
        "description": "Negative leg of the 1000BASE-T1 differential MDI pair, which is rated -0.5 V to 4 V and must be ESD-protected and coupled through the common-mode network per the layout guidance."
      },
      {
        "number": "14",
        "name": "STRP_1",
        "type": "input",
        "description": "Strap 1 pin sampled at power-up and reset to set the PHY_AD address bits, with internal pull-down of 6.3 kΩ (typical)."
      },
      {
        "number": "15",
        "name": "RX_CTRL",
        "type": "output",
        "description": "RGMII receive control that combines RX_DV and RX_ER, with RX_DV on the rising edge and RX_ER on the falling edge of RX_CLK; in SGMII mode it is used only as a strap."
      },
      {
        "number": "16",
        "name": "CLKOUT / GPIO_2",
        "type": "bidirectional",
        "description": "Outputs a buffered copy of the 25 MHz XI reference by default, and can be disabled by writing 0x0453 = 0x0006 if not used."
      },
      {
        "number": "17",
        "name": "DNC",
        "type": "unconnected",
        "description": "Do not connect; test structures on this pin must be left floating to avoid damage or entering an incorrect PHY mode."
      },
      {
        "number": "18",
        "name": "DNC",
        "type": "unconnected",
        "description": "Do not connect; test structures on this pin must be left floating to avoid damage or entering an incorrect PHY mode."
      },
      {
        "number": "19",
        "name": "DNC",
        "type": "unconnected",
        "description": "Do not connect; test structures on this pin must be left floating to avoid damage or entering an incorrect PHY mode."
      },
      {
        "number": "20",
        "name": "DNC",
        "type": "unconnected",
        "description": "Do not connect; test structures on this pin must be left floating to avoid damage or entering an incorrect PHY mode."
      },
      {
        "number": "21",
        "name": "VDD1P0",
        "type": "power_in",
        "description": "1.0 V core supply (0.95 V to 1.1 V); see the datasheet decoupling recommendations."
      },
      {
        "number": "22",
        "name": "VDDIO",
        "type": "power_in",
        "description": "I/O supply that operates at 1.8 V, 2.5 V or 3.3 V (1.62 V to 3.63 V across the three operating points); see the datasheet decoupling recommendations."
      },
      {
        "number": "23",
        "name": "RX_D3 / RX_M",
        "type": "output",
        "description": "In RGMII mode it outputs decoded receive data bit 3 synchronous to the RX_CLK rising edge, and in SGMII mode it is the negative leg of the differential data output to the MAC; it is a strap pin with internal pull-down of 9 kΩ."
      },
      {
        "number": "24",
        "name": "RX_D2 / RX_P",
        "type": "output",
        "description": "In RGMII mode it outputs decoded receive data bit 2 synchronous to the RX_CLK rising edge, and in SGMII mode it is the positive leg of the differential data output to the MAC; it is a strap pin with internal pull-down of 9 kΩ."
      },
      {
        "number": "25",
        "name": "RX_D1",
        "type": "output",
        "description": "In RGMII mode it outputs decoded receive data bit 1 synchronous to the RX_CLK rising edge; it is a strap pin with internal pull-down of 9 kΩ."
      },
      {
        "number": "26",
        "name": "RX_D0",
        "type": "output",
        "description": "In RGMII mode it outputs decoded receive data bit 0 synchronous to the RX_CLK rising edge; it is a strap pin with internal pull-down of 9 kΩ."
      },
      {
        "number": "27",
        "name": "RX_CLK",
        "type": "output",
        "description": "In RGMII mode the PHY supplies this 125 MHz receive clock to the MAC; it is not used in SGMII mode."
      },
      {
        "number": "28",
        "name": "TX_CLK",
        "type": "input",
        "description": "In RGMII mode the MAC supplies this 125 MHz transmit clock to the PHY; it is not used in SGMII mode."
      },
      {
        "number": "29",
        "name": "TX_CTRL",
        "type": "input",
        "description": "RGMII transmit control that combines TX_EN and TX_ER, with TX_EN sampled before the rising edge of TX_CLK and TX_ER on its falling edge; it is not used in SGMII mode."
      },
      {
        "number": "30",
        "name": "TX_D3",
        "type": "input",
        "description": "RGMII transmit data bit 3 from the MAC, sampled on TX_CLK."
      },
      {
        "number": "31",
        "name": "TX_D2",
        "type": "input",
        "description": "RGMII transmit data bit 2 from the MAC, sampled on TX_CLK."
      },
      {
        "number": "32",
        "name": "TX_D1 / TX_P",
        "type": "input",
        "description": "In RGMII mode it is transmit data bit 1 from the MAC, and in SGMII mode it is the positive leg of the differential data input from the MAC."
      },
      {
        "number": "33",
        "name": "TX_D0 / TX_M",
        "type": "input",
        "description": "In RGMII mode it is transmit data bit 0 from the MAC, and in SGMII mode it is the negative leg of the differential data input from the MAC."
      },
      {
        "number": "34",
        "name": "VDDIO",
        "type": "power_in",
        "description": "Second I/O supply pin for the VDDIO domain (1.8 V, 2.5 V or 3.3 V); see the datasheet decoupling recommendations."
      },
      {
        "number": "35",
        "name": "LED_0 / GPIO_0",
        "type": "bidirectional",
        "description": "LED_0 indicates link status and also acts as the MDI master/slave strap (internal pull-down, so slave by default), and it can be reconfigured as GPIO_0."
      },
      {
        "number": "36",
        "name": "MDIO",
        "type": "bidirectional",
        "description": "Open-drain management data input/output that requires an external 2.2 kΩ pull-up to VDDIO and is latched on the rising edge of MDC."
      },
      {
        "number": "37",
        "name": "EP",
        "type": "passive",
        "description": "Exposed pad (from the footprint; not named in the datasheet pin table)."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.3",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.3",
        "primary_model": "claude-haiku-5-5",
        "primary_mode": "text",
        "consensus_model": "claude-sonnet-5-5",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [
          "extractor flagged: The exposed thermal pad is listed as ground in Table 4-1 but the datasheet gives it no pin number, s; Table 4-1 lists these as DNC but Figure 4-1 does not label them, and the Chinese-language table text; Table 4-1 gives the RESET_N minimum low pulse as 10 µs, while the timing table T6.1 gives 5 µs; the ",
          "exposed pad 37 added from the footprint"
        ],
        "pages_sent": 64,
        "cost_usd": 0.2845,
        "at": "2026-10-12T11:06:23"
      },
      "datasheet": {
        "url": "https://www.ti.com/cn/lit/gpn/dp83tg720s-q1",
        "pages": 178,
        "sha256": "646e55196d701cdd",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 37,
        "described": 37,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
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}