DP83TG720RWRHARQ1

{
  "slug": "dp83tg720rwrharq1",
  "version": "0.1.0",
  "type": "component",
  "description": "Texas Instruments Ethernet ICs, TQFN-36-EP(6x6). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "tags": [
    "component",
    "communication interface chip-uart-485-232",
    "dp83tg720rwrharq1",
    "factory-2.0.0",
    "extractor-text"
  ],
  "dependencies": {},
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    "path": "docs/hero.png"
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    "dp83tg720rwrharq1.kicad_mod",
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    "dp83tg720rwrharq1.step",
    "dp83tg720rwrharq1.lbr",
    "docs/hero.png",
    "docs/dp83tg720rwrharq1-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html",
    "dp83tg720rwrharq1-hero.glb",
    "dp83tg720rwrharq1-hero.overlay.json",
    "dp83tg720rwrharq1-etched.glb"
  ],
  "component": {
    "mpn": "DP83TG720RWRHARQ1",
    "manufacturer": "Texas Instruments",
    "package": "TQFN-36-EP(6x6)",
    "pin_count": 37,
    "category": "Communication Interface Chip/UART/485/232",
    "subcategory": "Ethernet ICs",
    "datasheet": "https://www.ti.com/lit/ds/symlink/dp83tg720rwrharq1.pdf",
    "parts": {
      "symbol": "dp83tg720rwrharq1.kicad_sym",
      "footprint": "dp83tg720rwrharq1.kicad_mod",
      "model_3d": "dp83tg720rwrharq1-hero.glb",
      "model_3d_plain": "dp83tg720rwrharq1-etched.glb",
      "model_3d_step": "dp83tg720rwrharq1-etched.step",
      "model_3d_step_plain": "dp83tg720rwrharq1.step",
      "lbr": "dp83tg720rwrharq1.lbr"
    },
    "distributor_links": {
      "lcsc": "C2868255",
      "digikey": "296-DP83TG720RWRHARQ1TR-ND",
      "mouser": "595-P83TG720RWRHARQ1"
    },
    "distributor_check": {
      "checked_at": "2026-10-30T17:15:21Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": "296-DP83TG720RWRHARQ1TR-ND",
        "status": "found",
        "lifecycle": "Active"
      },
      "mouser": {
        "pn": "595-P83TG720RWRHARQ1",
        "status": "found"
      }
    },
    "pins": [
      {
        "number": "1",
        "name": "MDC",
        "type": "input",
        "description": "Management data clock input that synchronizes MDIO serial management data; it may be stopped by the external management entity when the bus is idle."
      },
      {
        "number": "2",
        "name": "INT_N",
        "type": "output",
        "description": "Active-low open-drain interrupt output with a weak internal pull-up (9 kΩ typical); it is asserted low on an interrupt and must be cleared through registers."
      },
      {
        "number": "3",
        "name": "RESET_N",
        "type": "input",
        "description": "Active-low reset input with internal 9 kΩ pull-up; it must be held low for at least 10 µs to force a reset, and bootstrap pins are re-sampled on release."
      },
      {
        "number": "4",
        "name": "XO",
        "type": "output",
        "description": "Crystal reference clock output used only with a crystal; it must be left unconnected when a CMOS-level oscillator drives XI."
      },
      {
        "number": "5",
        "name": "XI",
        "type": "input",
        "description": "Reference clock input accepting a 25 MHz ±100 ppm crystal or oscillator, or a CMOS-level oscillator driving XI alone."
      },
      {
        "number": "6",
        "name": "LED_1/GPIO_1",
        "type": "bidirectional",
        "description": "LED_1 indicates link status and flashes for TX/RX activity; it can also function as GPIO_1 and has an internal 9 kΩ pull-down."
      },
      {
        "number": "7",
        "name": "VSLEEP",
        "type": "power_in",
        "description": "Sleep-domain supply of 3.3 V (2.97 V to 3.63 V); if sleep is not used it must be connected to VDDA3P3."
      },
      {
        "number": "8",
        "name": "WAKE",
        "type": "input",
        "description": "Active-high wake input in the VSLEEP domain with a 50 kΩ internal pull-down; a high pulse wakes the PHY from sleep, and it may be tied to VSLEEP if sleep is unused."
      },
      {
        "number": "9",
        "name": "VDD1P0",
        "type": "power_in",
        "description": "1.0 V core supply (0.95 V to 1.1 V) that requires the recommended decoupling network."
      },
      {
        "number": "10",
        "name": "INH",
        "type": "output",
        "description": "Active-high PMOS open-drain output that releases the line in sleep so an external 10 kΩ pull-down can work, and otherwise drives high to VSLEEP."
      },
      {
        "number": "11",
        "name": "VDDA3P3",
        "type": "power_in",
        "description": "3.3 V analog/core supply (2.97 V to 3.63 V) that requires the recommended decoupling network."
      },
      {
        "number": "12",
        "name": "TRD_P",
        "type": "bidirectional",
        "description": "Positive side of the differential MDI pair for 1000BASE-T1 operation per IEEE 802.3bp; absolute maximum is -0.5 V to 4 V."
      },
      {
        "number": "13",
        "name": "TRD_M",
        "type": "bidirectional",
        "description": "Negative side of the differential MDI pair for 1000BASE-T1 operation per IEEE 802.3bp; absolute maximum is -0.5 V to 4 V."
      },
      {
        "number": "14",
        "name": "STRP_1",
        "type": "input",
        "description": "Strap input used to set the PHY_AD address bit, sampled at power-up and reset and carrying a 6.3 kΩ internal pull-down."
      },
      {
        "number": "15",
        "name": "RX_CTRL",
        "type": "output",
        "description": "RGMII receive control output combining RX_DV (valid on RX_CLK rising edge) and RX_ER (on RX_CLK falling edge); it is also a strap pin with a 6.3 kΩ internal pull-down."
      },
      {
        "number": "16",
        "name": "CLKOUT/GPIO_2",
        "type": "bidirectional",
        "description": "Clock output that defaults to a buffered 25 MHz copy of XI; it can be disabled by writing register 0x0453 = 0x0006 or used as GPIO_2."
      },
      {
        "number": "17",
        "name": "DNC",
        "type": "unconnected",
        "description": "Do not connect; test structures tied to these pins must be left floating to avoid damage or entering an incorrect PHY mode."
      },
      {
        "number": "18",
        "name": "DNC",
        "type": "unconnected",
        "description": "Do not connect; test structures tied to these pins must be left floating to avoid damage or entering an incorrect PHY mode."
      },
      {
        "number": "19",
        "name": "DNC",
        "type": "unconnected",
        "description": "Do not connect; test structures tied to these pins must be left floating to avoid damage or entering an incorrect PHY mode."
      },
      {
        "number": "20",
        "name": "DNC",
        "type": "unconnected",
        "description": "Do not connect; test structures tied to these pins must be left floating to avoid damage or entering an incorrect PHY mode."
      },
      {
        "number": "21",
        "name": "VDD1P0",
        "type": "power_in",
        "description": "1.0 V core supply (0.95 V to 1.1 V) that requires the recommended decoupling network."
      },
      {
        "number": "22",
        "name": "VDDIO",
        "type": "power_in",
        "description": "I/O supply that operates at 1.8 V (1.62 V to 1.98 V), 2.5 V (2.25 V to 2.75 V), or 3.3 V (2.97 V to 3.63 V)."
      },
      {
        "number": "23",
        "name": "RX_D3",
        "type": "output",
        "description": "RGMII receive data bit 3, driven synchronously with RX_CLK and valid when RX_DV is set; it has an internal 9 kΩ pull-down and a status-bit role in in-band signaling."
      },
      {
        "number": "24",
        "name": "RX_D2",
        "type": "output",
        "description": "RGMII receive data bit 2, driven synchronously with RX_CLK and valid when RX_DV is set; it has an internal 9 kΩ pull-down."
      },
      {
        "number": "25",
        "name": "RX_D1",
        "type": "output",
        "description": "RGMII receive data bit 1, driven synchronously with RX_CLK and valid when RX_DV is set; it has an internal 9 kΩ pull-down."
      },
      {
        "number": "26",
        "name": "RX_D0",
        "type": "output",
        "description": "RGMII receive data bit 0, driven synchronously with RX_CLK and valid when RX_DV is set; it has an internal 9 kΩ pull-down."
      },
      {
        "number": "27",
        "name": "RX_CLK",
        "type": "output",
        "description": "RGMII receive clock output that provides the 125 MHz clock to the MAC in RGMII mode."
      },
      {
        "number": "28",
        "name": "TX_CLK",
        "type": "input",
        "description": "RGMII transmit clock input that the MAC provides as a 125 MHz clock to the PHY in RGMII mode."
      },
      {
        "number": "29",
        "name": "TX_CTRL",
        "type": "input",
        "description": "RGMII transmit control input combining TX_EN (before the TX_CLK rising edge) and TX_ER (at the TX_CLK falling edge) from the MAC."
      },
      {
        "number": "30",
        "name": "TX_D3",
        "type": "input",
        "description": "RGMII transmit data bit 3 received from the MAC, forming the TX_D[3:0] nibble."
      },
      {
        "number": "31",
        "name": "TX_D2",
        "type": "input",
        "description": "RGMII transmit data bit 2 received from the MAC, forming the TX_D[3:0] nibble."
      },
      {
        "number": "32",
        "name": "TX_D1",
        "type": "input",
        "description": "RGMII transmit data bit 1 received from the MAC, forming the TX_D[3:0] nibble."
      },
      {
        "number": "33",
        "name": "TX_D0",
        "type": "input",
        "description": "RGMII transmit data bit 0 received from the MAC, forming the TX_D[3:0] nibble."
      },
      {
        "number": "34",
        "name": "VDDIO",
        "type": "power_in",
        "description": "I/O supply that operates at 1.8 V (1.62 V to 1.98 V), 2.5 V (2.25 V to 2.75 V), or 3.3 V (2.97 V to 3.63 V) and requires the recommended decoupling network."
      },
      {
        "number": "35",
        "name": "LED_0/GPIO_0",
        "type": "bidirectional",
        "description": "LED_0 indicates link status and also sets the MDI master/slave strap at boot, with an internal 9 kΩ pull-down that defaults the PHY to slave mode."
      },
      {
        "number": "36",
        "name": "MDIO",
        "type": "bidirectional",
        "description": "Open-drain management data input/output shared with the management station; it requires an external pull-up (2.2 kΩ recommended)."
      },
      {
        "number": "37",
        "name": "GND",
        "type": "power_in",
        "description": "Ground connection on the exposed die-attach pad (DAP), which must be soldered to the PCB for thermal and mechanical performance."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.3",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.3",
        "primary_model": "claude-haiku-5-5",
        "primary_mode": "text",
        "consensus_model": "claude-sonnet-5-5",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [
          "extractor flagged: Package name mismatch: the requested hint is TQFN-36-EP(6x6), but the datasheet lists this device on; Pin 37 is the exposed thermal pad (DAP). The table on page 5 gives it as 'DAP GROUND' with no number; Pin naming differs between sources. Table 6-1 prints 'INT', 'RESET', 'STRP_1' and 'VDDA3P3', while t",
          "2/37 pins cited to the wrong page (name found elsewhere): ['4:XO@p4', '37:GND@p5']"
        ],
        "pages_sent": 68,
        "cost_usd": 0.2977,
        "at": "2026-10-30T17:15:04"
      },
      "datasheet": {
        "url": "https://www.ti.com/lit/ds/symlink/dp83tg720rwrharq1.pdf",
        "pages": 218,
        "sha256": "1a3eac675e416d69",
        "source_tier": "mfr"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 37,
        "described": 37,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
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    "models_3d": [
      {
        "file": "dp83tg720rwrharq1.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6.0,
          6.0,
          0.77
        ],
        "zmin_mm": 0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "6212c4fd2463ccb7c6ae2c35f5e24c80884153fcaeaf8e86549c0e49087bc8bb",
        "checked": "2026-10-30",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "dp83tg720rwrharq1-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6.0,
          6.0,
          0.77
        ],
        "zmin_mm": 0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "102f81a3f852c4564d3b3f355383d64791ad377d4f1739c8d17a5b159829904b",
        "checked": "2026-10-30",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ],
    "package_dims": {
      "package_code": "RHA0036A",
      "source_page": 209,
      "D": {
        "nom_mm": 6.0,
        "range_mm": [
          5.9,
          6.1
        ]
      },
      "E1": {
        "nom_mm": 6.0,
        "range_mm": [
          5.9,
          6.1
        ]
      },
      "e": {
        "nom_mm": 0.5,
        "range_mm": [
          null,
          null
        ]
      },
      "A": {
        "nom_mm": 0.9,
        "range_mm": [
          0.8,
          1.0
        ]
      },
      "source": "datasheet package drawing, every number found on its page (extract_pins --task dims)",
      "model_check": {
        "file": "dp83tg720rwrharq1.step",
        "verdict": "PASS",
        "reasons": [
          "height within the datasheet's package drawing"
        ],
        "by": "factory/package_fit.py"
      }
    }
  }
}