component
DP83TC814RRHARQ1
Public Made by Adomby adom
Texas Instruments Ethernet ICs, VQFN-36(6x6). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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Publish 0.1.0
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{
"slug": "dp83tc814rrharq1",
"version": "0.1.0",
"type": "component",
"description": "Texas Instruments Ethernet ICs, VQFN-36(6x6). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
"tags": [
"component",
"communication interface chip-uart-485-232",
"dp83tc814rrharq1",
"factory-2.0.0",
"extractor-text"
],
"dependencies": {},
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],
"component": {
"mpn": "DP83TC814RRHARQ1",
"manufacturer": "Texas Instruments",
"package": "VQFN-36(6x6)",
"pin_count": 37,
"category": "Communication Interface Chip/UART/485/232",
"subcategory": "Ethernet ICs",
"datasheet": "https://www.ti.com/cn/lit/gpn/dp83tc814r-q1",
"parts": {
"symbol": "dp83tc814rrharq1.kicad_sym",
"footprint": "dp83tc814rrharq1.kicad_mod",
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"lbr": "dp83tc814rrharq1.lbr"
},
"distributor_links": {
"lcsc": "C3225815",
"digikey": "296-DP83TC814RRHARQ1TR-ND",
"mouser": "595-DP83TC814RRHARQ1"
},
"distributor_check": {
"checked_at": "2026-11-02T17:05:40Z",
"source": "Component Ocean /api/assign-pns",
"digikey": {
"pn": "296-DP83TC814RRHARQ1TR-ND",
"status": "found"
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"pn": "595-DP83TC814RRHARQ1",
"status": "found"
}
},
"pins": [
{
"number": "1",
"name": "MDC",
"type": "input",
"description": "Management data clock for MDIO serial management; maximum clock rate 20MHz with no minimum rate, and it may be asynchronous to the MAC clocks."
},
{
"number": "2",
"name": "INT_N",
"type": "output",
"description": "Active-low interrupt output with a weak internal pull-up; it can alternatively be used as a power-down input, and the pin is powered from VDDIO."
},
{
"number": "3",
"name": "RESET_N",
"type": "input",
"description": "Active-low reset input with an internal pull-up; it must be held low for at least 1µs to force a reset and straps are resampled on release."
},
{
"number": "4",
"name": "XO",
"type": "output",
"description": "Crystal reference clock output used only with a crystal; it must be left floating when a CMOS-level oscillator drives XI."
},
{
"number": "5",
"name": "XI",
"type": "input",
"description": "Reference clock input: 25MHz crystal or oscillator for MII/RGMII (50MHz CMOS oscillator in RMII slave mode), with a 100Ω series resistor when a crystal is used."
},
{
"number": "6",
"name": "LED_1/GPIO_1",
"type": "bidirectional",
"description": "Link-status LED that flashes on TX/RX activity, selectable as an LED or clock output via strap/register; the pin is in the VDDIO voltage domain."
},
{
"number": "7",
"name": "VDDA",
"type": "power_in",
"description": "Core supply pin at 3.3V (2.97V to 3.63V); a 0.1µF ceramic decoupling capacitor is recommended."
},
{
"number": "8",
"name": "DNC",
"type": "unconnected",
"description": "Do not connect; leave floating."
},
{
"number": "9",
"name": "NC",
"type": "unconnected",
"description": "No connect pin on this package; leave floating."
},
{
"number": "10",
"name": "DNC",
"type": "unconnected",
"description": "Do not connect; leave floating."
},
{
"number": "11",
"name": "VDDA",
"type": "power_in",
"description": "Core supply pin at 3.3V (2.97V to 3.63V); a 0.1µF ceramic decoupling capacitor is recommended."
},
{
"number": "12",
"name": "TRD_P",
"type": "bidirectional",
"description": "Positive side of the 100BASE-T1 differential transmit and receive pair, which connects to the MDI through the coupling network with a 100Ω differential termination."
},
{
"number": "13",
"name": "TRD_M",
"type": "bidirectional",
"description": "Negative side of the 100BASE-T1 differential transmit and receive pair, which connects to the MDI through the coupling network with a 100Ω differential termination."
},
{
"number": "14",
"name": "RX_ER",
"type": "output",
"description": "Receive error output, synchronized to RX_CLK in MII mode and the reference clock in RMII mode; it is an RGMII input when the RGMII interface is selected."
},
{
"number": "15",
"name": "RX_DV/CRS_DV/RX_CTRL",
"type": "output",
"description": "Multiplexed receive data valid (MII), carrier sense/data valid (RMII) or receive control (RGMII) output, selected by register 0x0551; it is in the VDDMAC domain."
},
{
"number": "16",
"name": "CLKOUT/GPIO_2",
"type": "bidirectional",
"description": "25MHz reference clock output (50MHz in RMII slave mode), also selectable as LED or GPIO; the pin is in the VDDMAC domain."
},
{
"number": "17",
"name": "GND_ESC",
"type": "passive",
"description": "Optional ground escape pin that may be connected to ground for PCB layout; it cannot replace the DAP power ground connection and may be left open if unused."
},
{
"number": "18",
"name": "GND_ESC",
"type": "passive",
"description": "Optional ground escape pin that may be connected to ground for PCB layout; it cannot replace the DAP power ground connection and may be left open if unused."
},
{
"number": "19",
"name": "DNC",
"type": "unconnected",
"description": "Do not connect; leave floating."
},
{
"number": "20",
"name": "DNC",
"type": "unconnected",
"description": "Do not connect; leave floating."
},
{
"number": "21",
"name": "NC",
"type": "unconnected",
"description": "No connect pin on this package; leave floating."
},
{
"number": "22",
"name": "VDDMAC",
"type": "power_in",
"description": "Optional MAC interface supply at 1.8V, 2.5V or 3.3V that may differ from VDDIO; it must be tied to VDDIO when a separate rail is not needed."
},
{
"number": "23",
"name": "RX_D3",
"type": "output",
"description": "Receive data bit 3 in MII/RGMII mode, RX_D[1:0] in RMII mode, and it outputs a 50MHz reference clock when RMII master mode is strapped; it is in the VDDMAC domain."
},
{
"number": "24",
"name": "RX_D2",
"type": "output",
"description": "Receive data bit 2 for MII and RGMII modes, unused in RMII slave mode, and it is in the VDDMAC domain."
},
{
"number": "25",
"name": "RX_D1",
"type": "output",
"description": "Receive data bit 1 for MII and RGMII modes and RMII receive data bit 1; it is in the VDDMAC domain."
},
{
"number": "26",
"name": "RX_D0",
"type": "output",
"description": "Receive data bit 0 for all MAC modes; it is in the VDDMAC domain."
},
{
"number": "27",
"name": "RX_CLK",
"type": "output",
"description": "Receive clock providing a 25MHz reference in MII and RGMII modes; it is not used in RMII mode."
},
{
"number": "28",
"name": "TX_CLK",
"type": "bidirectional",
"description": "Transmit clock that is a 25MHz output in MII mode and is supplied by the MAC as an input in RGMII mode, requiring a 25MHz clock."
},
{
"number": "29",
"name": "TX_EN/TX_CTRL",
"type": "input",
"description": "Transmit enable in MII/RMII modes or transmit control in RGMII mode, where TX_EN is sampled before the TX_CLK rising edge."
},
{
"number": "30",
"name": "TX_D3",
"type": "input",
"description": "Transmit data bit 3 sampled before TX_CLK rising edge in MII and RGMII modes; unused in RMII slave mode."
},
{
"number": "31",
"name": "TX_D2",
"type": "input",
"description": "Transmit data bit 2 sampled before TX_CLK rising edge in MII and RGMII modes; unused in RMII slave mode."
},
{
"number": "32",
"name": "TX_D1",
"type": "input",
"description": "Transmit data bit 1 sampled before the TX_CLK (MII/RGMII) or reference clock (RMII) rising edge; it is in the VDDMAC domain."
},
{
"number": "33",
"name": "TX_D0",
"type": "input",
"description": "Transmit data bit 0 sampled before the TX_CLK (MII/RGMII) or reference clock (RMII) rising edge; it is in the VDDMAC domain."
},
{
"number": "34",
"name": "VDDIO",
"type": "power_in",
"description": "IO supply at 1.8V, 2.5V or 3.3V (1.62V to 3.63V); decoupling with ferrite bead, 0.47µF and 0.01µF ceramic capacitors is recommended."
},
{
"number": "35",
"name": "LED_0/GPIO_0",
"type": "bidirectional",
"description": "Link status LED that can also be selected as an LED or clock output by register; it is in the VDDIO domain and has an internal pull-down."
},
{
"number": "36",
"name": "MDIO",
"type": "bidirectional",
"description": "Bidirectional management data line that requires a pull-up to VDDIO (2.2kΩ to 9kΩ recommended), needed for MDIO/MDC access for Open Alliance compliance."
},
{
"number": "37",
"name": "EP",
"type": "passive",
"description": "Exposed pad (from the footprint; not named in the datasheet pin table)."
}
],
"provenance": {
"extractor": "extract_pins 0.3",
"factory_chain": {
"factory": "2.0.0",
"extractor": "extract_pins 0.3",
"primary_model": "claude-haiku-5-5",
"primary_mode": "text",
"consensus_model": "claude-sonnet-5-5",
"consensus": "agreed",
"guards": "pin_guards 0.1: passed",
"guard_notes": [
"extractor flagged: The datasheet's pin table covers the 36-pin RHA VQFN for the DP83TC814R-Q1 variant, which matches th",
"2/37 pins cited to the wrong page (name found elsewhere): ['4:XO@p7', '5:XI@p7']"
],
"pages_sent": 80,
"cost_usd": 0.1003,
"at": "2026-11-02T17:05:25"
},
"datasheet": {
"url": "https://www.ti.com/cn/lit/gpn/dp83tc814r-q1",
"pages": 161,
"sha256": "d1fe2a72e0f7d7e6",
"source_tier": "mfr"
},
"cad": "KiCad official (CC-BY-SA 4.0)",
"pins": {
"total": 37,
"described": 37,
"cites_pages": true,
"refuses_to_fabricate": true
}
},
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"footprint": "viewers/footprint.html"
},
"models_3d": [
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"file": "dp83tc814rrharq1.step",
"role": "plain",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
6.0,
6.0,
0.77
],
"zmin_mm": 0.0,
"centre_offset_mm": 0.0,
"footprint_binding": "identity",
"sha256": "6212c4fd2463ccb7c6ae2c35f5e24c80884153fcaeaf8e86549c0e49087bc8bb",
"checked": "2026-11-02",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
},
{
"file": "dp83tc814rrharq1-etched.step",
"role": "eda",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
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"sha256": "4534f616acbbc7a13e587b2fd670b51c8075902d7bea72492617ac4da56d38f8",
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}