DP83869HMRGZT

<?xml version="1.0" encoding="utf-8"?>
<!DOCTYPE eagle SYSTEM "eagle.dtd">
<eagle version="9.6.2">
<drawing>
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<description></description>
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<package name="QFN-48-1EP_7x7mm_P0.5mm_EP5.15x5.15mm">
  <description>QFN-48-1EP, 7 x 7 mm, 0.5 mm pitch</description>
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  <text x="0" y="4.475" size="1.27" layer="25" align="bottom-center">&gt;NAME</text>
  <text x="0" y="-4.475" size="1.27" layer="27" align="top-center">&gt;VALUE</text>
</package>
</packages>
<symbols>
<symbol name="DP83869HMRGZT">
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  <wire x1="12.7" y1="33.02" x2="12.7" y2="-33.02" width="0.254" layer="94"/>
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  <pin name="VDDA2P5" x="-17.78" y="25.4" length="middle" direction="pwr"/>
  <pin name="TD_P_B" x="-17.78" y="22.86" length="middle" direction="io"/>
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  <pin name="TX_D2" x="17.78" y="-30.48" length="middle" direction="in" rot="R180"/>
</symbol>
</symbols>
<devicesets>
<deviceset name="DP83869HMRGZT" prefix="U">
  <description></description>
  <gates>
    <gate name="G$1" symbol="DP83869HMRGZT" x="0" y="0"/>
  </gates>
  <devices>
    <device name="" package="QFN-48-1EP_7x7mm_P0.5mm_EP5.15x5.15mm">
      <connects>
        <connect gate="G$1" pin="TD_P_A" pad="1"/>
        <connect gate="G$1" pin="TD_M_A" pad="2"/>
        <connect gate="G$1" pin="VDDA2P5" pad="3"/>
        <connect gate="G$1" pin="TD_P_B" pad="4"/>
        <connect gate="G$1" pin="TD_M_B" pad="5"/>
        <connect gate="G$1" pin="VDD1P1" pad="6"/>
        <connect gate="G$1" pin="TD_P_C" pad="7"/>
        <connect gate="G$1" pin="TD_M_C" pad="8"/>
        <connect gate="G$1" pin="VDDA2P5@2" pad="9"/>
        <connect gate="G$1" pin="TD_P_D" pad="10"/>
        <connect gate="G$1" pin="TD_M_D" pad="11"/>
        <connect gate="G$1" pin="RBIAS" pad="12"/>
        <connect gate="G$1" pin="VDDA1P8_1" pad="13"/>
        <connect gate="G$1" pin="SON" pad="14"/>
        <connect gate="G$1" pin="SOP" pad="15"/>
        <connect gate="G$1" pin="SIP" pad="16"/>
        <connect gate="G$1" pin="SIN" pad="17"/>
        <connect gate="G$1" pin="VDDIO" pad="18"/>
        <connect gate="G$1" pin="XO" pad="19"/>
        <connect gate="G$1" pin="XI" pad="20"/>
        <connect gate="G$1" pin="JTAG_CLK/TX_ER" pad="21"/>
        <connect gate="G$1" pin="JTAG_TDO/GPIO_1" pad="22"/>
        <connect gate="G$1" pin="JTAG_TMS" pad="23"/>
        <connect gate="G$1" pin="JTAG_TDI/SD" pad="24"/>
        <connect gate="G$1" pin="TX_D3" pad="25"/>
        <connect gate="G$1" pin="EP" pad="49"/>
        <connect gate="G$1" pin="VDDA1P8_2" pad="48"/>
        <connect gate="G$1" pin="LED_0" pad="47"/>
        <connect gate="G$1" pin="LED_1/RX_ER" pad="46"/>
        <connect gate="G$1" pin="LED_2/GPIO_0" pad="45"/>
        <connect gate="G$1" pin="INT_N/PWDN_N" pad="44"/>
        <connect gate="G$1" pin="RESET_N" pad="43"/>
        <connect gate="G$1" pin="MDC" pad="42"/>
        <connect gate="G$1" pin="MDIO" pad="41"/>
        <connect gate="G$1" pin="CLK_OUT" pad="40"/>
        <connect gate="G$1" pin="VDD1P1@2" pad="39"/>
        <connect gate="G$1" pin="RX_CTRL/RX_DV" pad="38"/>
        <connect gate="G$1" pin="TX_CTRL/TX_EN" pad="37"/>
        <connect gate="G$1" pin="RX_D3" pad="36"/>
        <connect gate="G$1" pin="RX_D2" pad="35"/>
        <connect gate="G$1" pin="RX_D1" pad="34"/>
        <connect gate="G$1" pin="RX_D0" pad="33"/>
        <connect gate="G$1" pin="RX_CLK" pad="32"/>
        <connect gate="G$1" pin="VDD1P1@3" pad="31"/>
        <connect gate="G$1" pin="VDDIO@2" pad="30"/>
        <connect gate="G$1" pin="GTX_CLK/TX_CLK" pad="29"/>
        <connect gate="G$1" pin="TX_D0" pad="28"/>
        <connect gate="G$1" pin="TX_D1" pad="27"/>
        <connect gate="G$1" pin="TX_D2" pad="26"/>
      </connects>
      <technologies><technology name=""/></technologies>
    </device>
  </devices>
</deviceset>
</devicesets>
</library>
</drawing>
</eagle>