DP83867IRRGZR

{
  "slug": "dp83867irrgzr",
  "version": "0.1.0",
  "type": "component",
  "description": "Texas Instruments Ethernet Transceivers, VQFN-48-EP(7x7). Pinout reviewed by a person against the datasheet, KiCad symbol/footprint/3D.",
  "tags": [
    "component",
    "interface",
    "dp83867irrgzr",
    "factory-2.0.0",
    "extractor-text"
  ],
  "dependencies": {},
  "hero": {
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    "path": "docs/hero.png"
  },
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    "dp83867irrgzr.glb",
    "dp83867irrgzr.step",
    "dp83867irrgzr.lbr",
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    "docs/dp83867irrgzr-datasheet.pdf",
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    "viewers/footprint.html",
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    "dp83867irrgzr-hero.overlay.json",
    "dp83867irrgzr-etched.glb"
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  "component": {
    "mpn": "DP83867IRRGZR",
    "manufacturer": "Texas Instruments",
    "package": "VQFN-48-EP(7x7)",
    "pin_count": 48,
    "category": "Interface",
    "subcategory": "Ethernet Transceivers",
    "datasheet": "https://www.ti.com/cn/lit/gpn/dp83867ir",
    "parts": {
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      "footprint": "dp83867irrgzr.kicad_mod",
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      "model_3d_step": "dp83867irrgzr-etched.step",
      "model_3d_step_plain": "dp83867irrgzr.step",
      "lbr": "dp83867irrgzr.lbr"
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    "distributor_links": {
      "lcsc": "C2678038"
    },
    "distributor_check": {
      "checked_at": "2026-10-21T16:13:04Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": null,
        "status": "quota"
      },
      "mouser": {
        "pn": null,
        "status": "quota"
      }
    },
    "pins": [
      {
        "number": "1",
        "name": "TD_P_A",
        "type": "passive",
        "description": "Differential transmit/receive signal pair A positive for 1000BASE-T MDI connection"
      },
      {
        "number": "2",
        "name": "TD_M_A",
        "type": "passive",
        "description": "Differential transmit/receive signal pair A negative for 1000BASE-T MDI connection"
      },
      {
        "number": "3",
        "name": "VDDA2P5",
        "type": "power_in",
        "description": "2.5V (±5%) analog power supply; each pin requires 1µF and 0.1µF bypass capacitors to ground"
      },
      {
        "number": "4",
        "name": "TD_P_B",
        "type": "passive",
        "description": "Differential transmit/receive signal pair B positive for 1000BASE-T MDI connection"
      },
      {
        "number": "5",
        "name": "TD_M_B",
        "type": "passive",
        "description": "Differential transmit/receive signal pair B negative for 1000BASE-T MDI connection"
      },
      {
        "number": "6",
        "name": "VDD1P0",
        "type": "power_in",
        "description": "1.0V (+15.5%, -5%) core analog power supply; each pin requires 1µF and 0.1µF bypass capacitors to ground"
      },
      {
        "number": "7",
        "name": "TD_P_C",
        "type": "passive",
        "description": "Differential transmit/receive signal pair C positive for 1000BASE-T MDI connection"
      },
      {
        "number": "8",
        "name": "TD_M_C",
        "type": "passive",
        "description": "Differential transmit/receive signal pair C negative for 1000BASE-T MDI connection"
      },
      {
        "number": "9",
        "name": "VDDA2P5",
        "type": "power_in",
        "description": "2.5V (±5%) analog power supply; each pin requires 1µF and 0.1µF bypass capacitors to ground"
      },
      {
        "number": "10",
        "name": "TD_P_D",
        "type": "passive",
        "description": "Differential transmit/receive signal pair D positive for 1000BASE-T MDI connection"
      },
      {
        "number": "11",
        "name": "TD_M_D",
        "type": "passive",
        "description": "Differential transmit/receive signal pair D negative for 1000BASE-T MDI connection"
      },
      {
        "number": "12",
        "name": "RBIAS",
        "type": "passive",
        "description": "Bias resistor connection; connect 11kΩ ±1% resistor to ground per design requirements"
      },
      {
        "number": "13",
        "name": "VDDA1P8",
        "type": "power_in",
        "description": "1.8V (±5%) analog power supply; may be left floating or connected to external 1.8V source with 1µF and 0.1µF bypass capacitors per operating mode"
      },
      {
        "number": "14",
        "name": "XO",
        "type": "output",
        "description": "Crystal oscillator output for 25MHz crystal; leave floating if using external oscillator"
      },
      {
        "number": "15",
        "name": "XI",
        "type": "input",
        "description": "Crystal oscillator or 25MHz oscillator input (50ppm maximum frequency tolerance)"
      },
      {
        "number": "16",
        "name": "MDC",
        "type": "input",
        "description": "Management data clock for MDIO interface; maximum frequency 25MHz with no minimum requirement; supports IEEE 802.3 SMI protocol"
      },
      {
        "number": "17",
        "name": "MDIO",
        "type": "bidirectional",
        "description": "Bidirectional management data input/output for SMI access; requires external 1.5kΩ or 2.2kΩ pull-up resistor to VDDIO per IEEE specification"
      },
      {
        "number": "18",
        "name": "CLK_OUT",
        "type": "output",
        "description": "Selectable clock output; configurable to output 25MHz reference, 125MHz receive clock, or divided 25MHz via IO_MUX_CFG register (address 0x0170)"
      },
      {
        "number": "19",
        "name": "VDDIO",
        "type": "power_in",
        "description": "I/O power supply selectable as 3.3V, 2.5V, or 1.8V (±5%); each pin requires 1µF and 0.1µF bypass capacitors to ground"
      },
      {
        "number": "20",
        "name": "JTAG_CLK",
        "type": "input",
        "description": "IEEE 1149.1 JTAG test clock input; maximum frequency 2.5MHz; all test logic inputs and outputs clock source controlled by test entity"
      },
      {
        "number": "21",
        "name": "JTAG_TDO",
        "type": "output",
        "description": "IEEE 1149.1 JTAG test data output; latest test results scanned out through this pin per IEEE standard"
      },
      {
        "number": "22",
        "name": "JTAG_TMS",
        "type": "input",
        "description": "IEEE 1149.1 JTAG test mode select input; provides timing control to TAP controller's 16-state FSM for selecting test instructions"
      },
      {
        "number": "23",
        "name": "JTAG_TDI",
        "type": "input",
        "description": "IEEE 1149.1 JTAG test data input; test data scanned into device through this pin per IEEE 1149.1 standard"
      },
      {
        "number": "24",
        "name": "VDD1P0",
        "type": "power_in",
        "description": "1.0V (+15.5%, -5%) core analog power supply; each pin requires 1µF and 0.1µF bypass capacitors to ground"
      },
      {
        "number": "25",
        "name": "TX_D3",
        "type": "input",
        "description": "Transmit data bit 3 for GMII/RGMII/MII modes; synchronized to GTX_CLK in GMII/RGMII or TX_CLK in MII; active per MAC layer requirements"
      },
      {
        "number": "26",
        "name": "TX_D2",
        "type": "input",
        "description": "Transmit data bit 2 for GMII/RGMII/MII modes; synchronized to GTX_CLK in GMII/RGMII or TX_CLK in MII; active per MAC layer requirements"
      },
      {
        "number": "27",
        "name": "TX_D1",
        "type": "input",
        "description": "Transmit data bit 1 for GMII/RGMII/MII modes; synchronized to GTX_CLK in GMII/RGMII or TX_CLK in MII; active per MAC layer requirements"
      },
      {
        "number": "28",
        "name": "TX_D0",
        "type": "input",
        "description": "Transmit data bit 0 for GMII/RGMII/MII modes; synchronized to GTX_CLK in GMII/RGMII or TX_CLK in MII; active per MAC layer requirements"
      },
      {
        "number": "29",
        "name": "GTX_CLK",
        "type": "input",
        "description": "GMII and RGMII transmit clock input from MAC; nominal frequency 125MHz for gigabit operation; externally supplied continuous clock signal"
      },
      {
        "number": "30",
        "name": "VDDIO",
        "type": "power_in",
        "description": "I/O power supply selectable as 3.3V, 2.5V, or 1.8V (±5%); each pin requires 1µF and 0.1µF bypass capacitors to ground"
      },
      {
        "number": "31",
        "name": "VDD1P0",
        "type": "power_in",
        "description": "1.0V (+15.5%, -5%) core analog power supply; each pin requires 1µF and 0.1µF bypass capacitors to ground"
      },
      {
        "number": "32",
        "name": "RX_CLK",
        "type": "output",
        "description": "Recovered receive clock output; 2.5MHz for 10Mbps, 25MHz for 100Mbps, 125MHz for 1000Mbps GMII/RGMII modes"
      },
      {
        "number": "33",
        "name": "RX_D0",
        "type": "output",
        "description": "Receive data bit 0 for GMII/RGMII/MII modes; synchronized to RX_CLK; active when valid data present per operating mode"
      },
      {
        "number": "34",
        "name": "RX_D1",
        "type": "output",
        "description": "Receive data bit 1 for GMII/RGMII/MII modes; synchronized to RX_CLK; active when valid data present per operating mode"
      },
      {
        "number": "35",
        "name": "RX_D2",
        "type": "output",
        "description": "Receive data bit 2 for GMII/RGMII/MII modes; synchronized to RX_CLK; active when valid data present per operating mode"
      },
      {
        "number": "36",
        "name": "RX_D3",
        "type": "output",
        "description": "Receive data bit 3 for GMII/RGMII/MII modes; synchronized to RX_CLK; active when valid data present per operating mode"
      },
      {
        "number": "37",
        "name": "TX_CTRL",
        "type": "input",
        "description": "Transmit control signal for RGMII mode multiplexing GMII TX_EN and TX_ER using dual clock edges on GTX_CLK for low power operation"
      },
      {
        "number": "38",
        "name": "RX_CTRL",
        "type": "output",
        "description": "Receive control signal for RGMII mode multiplexing GMII RX_DV and RX_ER using dual clock edges on RX_CLK for valid data indication"
      },
      {
        "number": "39",
        "name": "GPIO_1",
        "type": "bidirectional",
        "description": "Configurable general-purpose I/O pin #1; supports multiplexed functions via GPIO_MUX_CTRL2 register (address 0x0172) including WoL, 1588 SFD, LED, and PRBS status"
      },
      {
        "number": "40",
        "name": "GPIO_0",
        "type": "bidirectional",
        "description": "Configurable general-purpose I/O pin #0; supports multiplexed functions via GPIO_MUX_CTRL2 register (address 0x0172) including WoL, 1588 SFD, LED, and PRBS status"
      },
      {
        "number": "41",
        "name": "VDDIO",
        "type": "power_in",
        "description": "I/O power supply selectable as 3.3V, 2.5V, or 1.8V (±5%); each pin requires 1µF and 0.1µF bypass capacitors to ground"
      },
      {
        "number": "42",
        "name": "VDD1P0",
        "type": "power_in",
        "description": "1.0V (+15.5%, -5%) core analog power supply; each pin requires 1µF and 0.1µF bypass capacitors to ground"
      },
      {
        "number": "43",
        "name": "RESET_N",
        "type": "input",
        "description": "Active-low hardware reset input; pulse width minimum 1µs at low level initializes and reinitializes DP83867; has internal pull-up resistor"
      },
      {
        "number": "44",
        "name": "INT/PWDN",
        "type": "bidirectional",
        "description": "Configurable as interrupt output or power-down input; default function is power-down (active-low); can be programmed via CFG3 register (address 0x001E) bit 7 as open-drain interrupt output"
      },
      {
        "number": "45",
        "name": "LED_2",
        "type": "output",
        "description": "Configurable LED output for status indication; default function shows receive or transmit activity; alternate functions via LEDCR1 register (address 0x0018) bits 11:8; strap configuration pin for RGMII clock skew"
      },
      {
        "number": "46",
        "name": "LED_1",
        "type": "output",
        "description": "Configurable LED output for status indication; default function indicates 1000BASE-T link established; alternate functions via LEDCR1 register (address 0x0018) bits 7:4"
      },
      {
        "number": "47",
        "name": "LED_0",
        "type": "output",
        "description": "Configurable LED output for status indication; default function indicates any speed link established; alternate functions via LEDCR1 register (address 0x0018) bits 3:0"
      },
      {
        "number": "48",
        "name": "VDDA1P8",
        "type": "power_in",
        "description": "1.8V (±5%) analog power supply and die attach pad (GND); may be left floating in dual supply mode or connected to 1.8V source in triple supply mode with 1µF and 0.1µF bypass capacitors"
      }
    ],
    "provenance": {
      "extractor": "ds2sf",
      "datasheet": {
        "url": "https://www.ti.com/cn/lit/gpn/dp83867ir",
        "pages": 136,
        "sha256": "86c425421d9ee17a",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 48,
        "described": 48,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
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}