component
DP4111
Public Made by Adomby adom
Shenzhen Developer Microelec AC-DC Controllers and Regulators, SOP-8. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
main
Ray
dp4111: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding)
26e7aec
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"lbr": "dp4111.lbr"
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"distributor_links": {
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"pins": [
{
"number": "1",
"name": "GND",
"type": "power_in",
"description": "IC reference ground and source of the internal power MOSFET. Pins 1, 2, 3 are tied together internally."
},
{
"number": "2",
"name": "GND",
"type": "power_in",
"description": "IC reference ground and source of the internal power MOSFET. Pins 1, 2, 3 are tied together internally."
},
{
"number": "3",
"name": "GND",
"type": "power_in",
"description": "IC reference ground and source of the internal power MOSFET. Pins 1, 2, 3 are tied together internally."
},
{
"number": "4",
"name": "VDD",
"type": "power_in",
"description": "IC supply pin. Internally regulated to ~7.1 V via a high-voltage LDO from the Drain pin (no auxiliary winding required). UVLO thresholds: VDD_ON=4.0 V typ, VDD_OFF=3.1 V typ; clamped at 7.4 V typ (5 mA). Recommended decoupling: ≥0.1 µF ceramic."
},
{
"number": "5",
"name": "Drain",
"type": "power_in",
"description": "Drain of the internal synchronous-rectifier power MOSFET (BVDSS = 45 V, Rds_on ≈ 10 mΩ for DP4111). Pins 5, 6, 7, 8 are tied together internally for current handling."
},
{
"number": "6",
"name": "Drain",
"type": "power_in",
"description": "Drain of the internal synchronous-rectifier power MOSFET (BVDSS = 45 V, Rds_on ≈ 10 mΩ for DP4111). Pins 5, 6, 7, 8 are tied together internally."
},
{
"number": "7",
"name": "Drain",
"type": "power_in",
"description": "Drain of the internal synchronous-rectifier power MOSFET (BVDSS = 45 V, Rds_on ≈ 10 mΩ for DP4111). Pins 5, 6, 7, 8 are tied together internally."
},
{
"number": "8",
"name": "Drain",
"type": "power_in",
"description": "Drain of the internal synchronous-rectifier power MOSFET (BVDSS = 45 V, Rds_on ≈ 10 mΩ for DP4111). Pins 5, 6, 7, 8 are tied together internally."
}
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"sha256": "8aaccc46363990e6",
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"pin1": {
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"corner": "top-left",
"source": "silk-marker",
"derived_from": "SOIC-8_3.9x4.9mm_P1.27mm@sha256:074ecb2092b24fa4",
"mark": "drawn"
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"role": "plain",
"up": "Z",
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"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
6,
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1.75
],
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"centre_offset_mm": 0,
"footprint_binding": "identity",
"sha256": "07f46cff378d30e6c27dfd5a03092c795323f86d91c71fc7e743f4f418dc553a",
"checked": "2026-10-07",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
},
{
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"up": "Z",
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"checked": "2026-10-07",
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}
]
},
"metadata": {
"specs": {
"Manufacturer": "Shenzhen Developer Microelec",
"Package": "SOP-8",
"Category": "PMIC",
"Pins": "8"
}
},
"sections": [
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"dp4111-etched.step",
"dp4111.lbr",
"docs/hero.png",
"docs/dp4111-datasheet.pdf",
"viewers/symbol.html",
"viewers/footprint.html"
],
"visibility": {
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},
"variants": [
{
"mpn": "DP4111",
"kind": "packaging"
}
],
"updated_at": "2026-09-24T19:53:25.874Z"
}