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DP3367C
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Shenzhen Developer Microelec Battery Management ICs, SOP-8. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
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dp3367c: laser-etched CAD + chip hero (factory 2.0.0 backfill)
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DP3367C
Shenzhen Developer Microelec · Battery Management ICs · SOP-8
DP3367C from Shenzhen Developer Microelec, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | GND | power_in | Ground reference for the internal circuitry of the chip. |
| 2 | VDD | power_in | Supply pin for the internal circuitry. Recommended operating range 9-40V; UVLO turn-on typ 13.4V, turn-off typ 7.8V, OVP typ 43V. Startup current ~3uA typ (10uA max). |
| 3 | FB | input | Feedback input pin. PWM output frequency and duty cycle are set by FB together with CS. FB open-circuit voltage 5.7V, short-circuit current typ 150uA, overload threshold 3.5V, internal pull-down ~30k. |
| 4 | CS | input | Inductor peak current sense input. Cycle-by-cycle current limit VOCP typ 0.65V (at Duty=0). Leading-edge blanking typ 400ns, internal impedance ~40k. |
| 5 | Drain | output | Drain of the integrated high-voltage power MOSFET (650V BVdss, Rds(on) ~0.95Ω, 4.5A). Pins 5-8 are internally tied together to increase current/thermal capacity. |
| 6 | Drain | output | Drain of the integrated high-voltage power MOSFET (650V BVdss). Commoned with pins 5, 7, 8. |
| 7 | Drain | output | Drain of the integrated high-voltage power MOSFET (650V BVdss). Commoned with pins 5, 6, 8. |
| 8 | Drain | output | Drain of the integrated high-voltage power MOSFET (650V BVdss). Commoned with pins 5, 6, 7. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Shenzhen Developer Microelec |
| Package | SOP-8 |
| Category | Power Supply Chip |
| Pins | 8 |
Ordering variants
Same part, different packaging or reel option.
DP3367C
CAD (KiCad official)
- Symbol:
DP3367C - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOP-8 (KiCad packages3D, STEP)
- 3D model files:
dp3367c-etched.step/dp3367c-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);dp3367c.step/dp3367c.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Shenzhen Developer Microelec datasheet (7 pp, sha256
9dba9352d8034e58, retrieved 2026-08-17, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor:
ds2sf(Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# DP3367C
**Shenzhen Developer Microelec** · Battery Management ICs · SOP-8
DP3367C from Shenzhen Developer Microelec, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | GND | power_in | Ground reference for the internal circuitry of the chip. |
| 2 | VDD | power_in | Supply pin for the internal circuitry. Recommended operating range 9-40V; UVLO turn-on typ 13.4V, turn-off typ 7.8V, OVP typ 43V. Startup current ~3uA typ (10uA max). |
| 3 | FB | input | Feedback input pin. PWM output frequency and duty cycle are set by FB together with CS. FB open-circuit voltage 5.7V, short-circuit current typ 150uA, overload threshold 3.5V, internal pull-down ~30k. |
| 4 | CS | input | Inductor peak current sense input. Cycle-by-cycle current limit VOCP typ 0.65V (at Duty=0). Leading-edge blanking typ 400ns, internal impedance ~40k. |
| 5 | Drain | output | Drain of the integrated high-voltage power MOSFET (650V BVdss, Rds(on) ~0.95Ω, 4.5A). Pins 5-8 are internally tied together to increase current/thermal capacity. |
| 6 | Drain | output | Drain of the integrated high-voltage power MOSFET (650V BVdss). Commoned with pins 5, 7, 8. |
| 7 | Drain | output | Drain of the integrated high-voltage power MOSFET (650V BVdss). Commoned with pins 5, 6, 8. |
| 8 | Drain | output | Drain of the integrated high-voltage power MOSFET (650V BVdss). Commoned with pins 5, 6, 7. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Shenzhen Developer Microelec |
| Package | SOP-8 |
| Category | Power Supply Chip |
| Pins | 8 |
## Ordering variants
Same part, different packaging or reel option.
- `DP3367C`
## CAD (KiCad official)
- Symbol: `DP3367C`
- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`
- 3D model: SOP-8 (KiCad packages3D, STEP)
- 3D model files: `dp3367c-etched.step` / `dp3367c-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `dp3367c.step` / `dp3367c.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Shenzhen Developer Microelec datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8590226438537310208) (7 pp, sha256 `9dba9352d8034e58`, retrieved 2026-08-17, tier: lcsc)
- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- **Extractor:** `ds2sf` (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/dp3367c-datasheet.pdf)