component

DN1509N8-G

Public Made by Adom

by adom

Microchip Tech MOSFETs, SOT-89. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componenttransistors-thyristorsdn1509n8-gfactory-2.0.0extractor-text
Overview Files Discover Packages Releases Dependencies Issues Breadcrumbs Pull Requests Activity
main
Download ZIP Propose a change
Made with KiCad 10.0 · needs KiCad 10.0 or later to open · KiCad file format 20260206
Name Last commit message Last updated
docs Publish 0.1.0 · Ray 14d ago
viewers dn1509n8-g: viewers · Ray 14d ago
dn1509n8-g-etched.glb Publish 0.1.0 · Ray 14d ago
dn1509n8-g-etched.step dn1509n8-g: factory component page (tier=lcsc) · Ray 14d ago
dn1509n8-g-hero.glb dn1509n8-g: hero GLB from the etched model (keeps the MPN mark) · Ray 14d ago
dn1509n8-g-hero.overlay.json Publish 0.1.0 · Ray 14d ago
dn1509n8-g.glb Publish 0.1.0 · Ray 14d ago
dn1509n8-g.kicad_mod Publish 0.1.0 · Ray 14d ago
dn1509n8-g.kicad_sym Publish 0.1.0 · Ray 14d ago
dn1509n8-g.lbr Publish 0.1.0 · Ray 14d ago
dn1509n8-g.step Publish 0.1.0 · Ray 14d ago
package.json Publish 0.1.0 · Ray 14d ago
page.json Set visibility: public · Ray 14d ago
README.md Publish 0.1.0 · Ray 14d ago

DN1509N8-G

Microchip Tech · MOSFETs · SOT-89

DN1509N8-G from Microchip Tech, in a SOT-89. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 GATE input Gate terminal; the datasheet limits gate-to-source voltage to ±20V and gives a gate-to-source off voltage of -1.8V to -3.5V at ID = 10µA.
2 DRAIN passive Drain terminal; drain-to-source breakdown voltage (BVDSX) is 90V minimum, and continuous drain current is limited to 360 mA for the SOT-89 package.
3 SOURCE passive Source terminal; saturated drain-to-source current (IDSS) is 300 mA minimum at VGS = 0V and VDS = 25V.

Key specifications

Parameter Value
Manufacturer Microchip Tech
Package SOT-89
Category Transistors/Thyristors
Pins 3

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Drain-to-source breakdown voltage BVDSX 90 V VGS = -5V, ID = 1.0µA 3
Gate-to-source off voltage VGS(OFF) -1.8 -3.5 V ID = 10µA 3
VGS(OFF) change with temperature ∆VGS(OFF) -4.5 mV/°C VDS = 15V, ID= 10µA (Note 2) 3
Gate body leakage IGSS 100 nA VGS = ±20V, VDS = 0V 3
Drain-to-source leakage current ID(OFF) 1 µA VDS = BVDSX, VGS = -5.0V 3
Drain-to-source leakage current at TA = 125°C ID(OFF) 1 mA VDS = 0.8 BVDSX, VGS = -5.0V, TA= 125°C (Note 2) 3
Saturated drain-to-source current IDSS 300 540 mA VGS = 0V, VDS = 25V 3
Static drain-to-source on-state resistance RDS(ON) 3.2 6 Ω VGS = 0V, ID= 200mA 3
Change in RDS(ON) with temperature ∆RDS(ON) 1.1 %/°C VGS = 0V, ID= 200mA (Note 2) 3
Forward transconductance GFS 200 mmho VDS = 10V, ID= 200mA 3
Input capacitance CISS 70 150 pF VGS = -10V, VDS = 25V, f = 1MHz 3
Common source output capacitance COSS 20 40 pF VGS = -10V, VDS = 25V, f = 1MHz 3
Reverse transfer capacitance CRSS 6 15 pF VGS = -10V, VDS = 25V, f = 1MHz 3
Turn-on delay time td(ON) 12 30 ns VDD = 25V, ID = 100mA, RGEN = 25Ω 3
Rise time tr 16 45 ns VDD = 25V, ID = 100mA, RGEN = 25Ω 3
Turn-off delay time td(OFF) 15 45 ns VDD = 25V, ID = 100mA, RGEN = 25Ω 3
Fall time tf 25 60 ns VDD = 25V, ID = 100mA, RGEN = 25Ω 3
Diode forward voltage drop VSD 1.8 V VGS = -5.0V, ISD= 500mA (Note 1) 3
Gate-to-source voltage VGS -20 20 V 3
Operating and storage temperature -55 150 °C 3
Typical thermal resistance, junction to ambient (TO-243AA, SOT-89) θja 78 °C/W Mounted on FR4 board, 25mm x 25mm x 1.57 mm 4
ID continuous (TO-243AA) ID 360 mA ID continuous limited by max rated TJ 4
ID pulsed (TO-243AA) ID 500 mA 4
Power dissipation (TO-243AA) 1.62 W @TA = 2.5°C 4
IDR (TO-243AA) IDR 360 mA 4
IDRM (TO-243AA) IDRM 500 mA 4

CAD (KiCad official)

  • Symbol: DN1509N8-G
  • Footprint: Package_TO_SOT_SMD:SOT-89-3
  • 3D model: SOT-89 (KiCad packages3D, STEP)
  • 3D model files: dn1509n8-g-etched.step / dn1509n8-g-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); dn1509n8-g.step / dn1509n8-g.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Microchip Tech datasheet (12 pp, sha256 4a9f4b9fbcbcca2f, retrieved 2026-10-20, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF