component
DMP510DLW-7
Public Made by Adomby adom
Diodes Incorporated MOSFETs, SOT-323. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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DMP510DLW-7
Diodes Incorporated · MOSFETs · SOT-323
DMP510DLW-7 from Diodes Incorporated, in a SOT-323. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | G | input | Gate; controls the channel with VGSS limited to ±20 V and a threshold VGS(TH) of -0.8 V to -2.0 V. |
| 2 | S | passive | Source; the equivalent circuit shows the body diode anode here, with continuous body diode current IS of -65 mA. |
| 3 | D | passive | Drain; VDSS is -50 V and continuous ID is -174 mA at TA = +25°C. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Diodes Incorporated |
| Package | SOT-323 |
| Category | Triode/MOS Tube/Transistor |
| Pins | 3 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Drain-Source Breakdown Voltage | BVDSS | -50 | V | VGS = 0V, ID = -250µA | 2 | ||
| Zero Gate Voltage Drain Current | IDSS | -1 | µA | VDS = -50V, VGS = 0V | 2 | ||
| Gate-Source Leakage | IGSS | -100 | 100 | nA | VGS = 16V, VDS = 0V | 2 | |
| Gate Threshold Voltage | VGS(TH) | -0.8 | -2 | V | VDS = VGS, ID = -1mA | 2 | |
| Static Drain-Source On-Resistance | RDS(ON) | 10 | Ω | VGS = -5V, ID = -0.1A | 2 | ||
| Diode Forward Voltage | VSD | -0.78 | -1.5 | V | VGS = 0V, IS = -100mA | 2 | |
| Drain-Source Voltage | VDSS | -50 | V | TA = +25°C | 2 | ||
| Gate-Source Voltage | VGSS | -20 | 20 | V | TA = +25°C | 2 | |
| Continuous Drain Current | ID | -174 | mA | VGS = -5V, Steady State, TA = +25°C, Note 6 | 2 | ||
| Continuous Drain Current | ID | -139 | mA | VGS = -5V, Steady State, TA = +70°C, Note 6 | 2 | ||
| Maximum Continuous Body Diode Forward Current | IS | -65 | mA | Note 6 | 2 | ||
| Pulsed Drain Current | IDM | -1 | A | 10µs Pulse, Duty Cycle = 1%, Note 6 | 2 | ||
| Total Power Dissipation | PD | 320 | mW | Note 5, TA = +25°C | 2 | ||
| Total Power Dissipation | PD | 470 | mW | Note 6, TA = +25°C | 2 | ||
| Operating and Storage Temperature Range | TJ, TSTG | -55 | 150 | °C | 2 | ||
| Thermal Resistance, Junction to Ambient | RθJA | 398 | °C/W | Note 5, Steady State | 2 | ||
| Thermal Resistance, Junction to Ambient | RθJA | 273 | °C/W | Note 6, Steady State | 2 | ||
| Input Capacitance | Ciss | 24.6 | pF | VDS = -25V, VGS = 0V, f = 1.0MHz | 2 | ||
| Output Capacitance | Coss | 4.8 | pF | VDS = -25V, VGS = 0V, f = 1.0MHz | 2 | ||
| Reverse Transfer Capacitance | Crss | 2.8 | pF | VDS = -25V, VGS = 0V, f = 1.0MHz | 2 | ||
| Gate Resistance | Rg | 2000 | Ω | f = 1.0MHz, VGS = 0V, VDS = 0V | 2 | ||
| Total Gate Charge (VGS = -4.5V) | Qg | 280 | pC | VGS = -4.5V, VDS = -10V, ID = -100mA | 2 | ||
| Total Gate Charge (VGS = -10V) | Qg | 560 | pC | VGS = -4.5V, VDS = -10V, ID = -100mA | 2 | ||
| Gate-Source Charge | Qgs | 90 | pC | VGS = -4.5V, VDS = -10V, ID = -100mA | 2 | ||
| Gate-Drain Charge | Qgd | 77 | pC | VGS = -4.5V, VDS = -10V, ID = -100mA | 2 | ||
| Turn-On Delay Time | tD(ON) | 2.8 | ns | VDD = -30V, ID = -0.27A, RGEN = 50, VGS = -10V | 2 | ||
| Turn-On Rise Time | tR | 2.6 | ns | VDD = -30V, ID = -0.27A, RGEN = 50, VGS = -10V | 2 | ||
| Turn-Off Delay Time | tD(OFF) | 11.1 | ns | VDD = -30V, ID = -0.27A, RGEN = 50, VGS = -10V | 2 | ||
| Turn-Off Fall Time | tF | 7.2 | ns | VDD = -30V, ID = -0.27A, RGEN = 50, VGS = -10V | 2 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | tin | Terminals: Finish Matte Tin Annealed over Alloy 42 Leadframe. Solderable per MIL-STD-202, Method 208 | 1 |
CAD (KiCad official)
- Symbol:
DMP510DLW-7 - Footprint:
Package_TO_SOT_SMD:SOT-323_SC-70 - 3D model: SOT-323 (KiCad packages3D, STEP)
- 3D model files:
dmp510dlw-7-etched.step/dmp510dlw-7-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);dmp510dlw-7.step/dmp510dlw-7.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Diodes Incorporated datasheet (7 pp, sha256
d1a2e8567a6c38f0, retrieved 2026-10-26, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text+vision), consensusclaude-opus-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# DMP510DLW-7
**Diodes Incorporated** · MOSFETs · SOT-323
DMP510DLW-7 from Diodes Incorporated, in a SOT-323. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | G | input | Gate; controls the channel with VGSS limited to ±20 V and a threshold VGS(TH) of -0.8 V to -2.0 V. |
| 2 | S | passive | Source; the equivalent circuit shows the body diode anode here, with continuous body diode current IS of -65 mA. |
| 3 | D | passive | Drain; VDSS is -50 V and continuous ID is -174 mA at TA = +25°C. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Diodes Incorporated |
| Package | SOT-323 |
| Category | Triode/MOS Tube/Transistor |
| Pins | 3 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Drain-Source Breakdown Voltage | BVDSS | -50 | | | V | VGS = 0V, ID = -250µA | 2 |
| Zero Gate Voltage Drain Current | IDSS | | | -1 | µA | VDS = -50V, VGS = 0V | 2 |
| Gate-Source Leakage | IGSS | -100 | | 100 | nA | VGS = 16V, VDS = 0V | 2 |
| Gate Threshold Voltage | VGS(TH) | -0.8 | | -2 | V | VDS = VGS, ID = -1mA | 2 |
| Static Drain-Source On-Resistance | RDS(ON) | | | 10 | Ω | VGS = -5V, ID = -0.1A | 2 |
| Diode Forward Voltage | VSD | | -0.78 | -1.5 | V | VGS = 0V, IS = -100mA | 2 |
| Drain-Source Voltage | VDSS | | | -50 | V | TA = +25°C | 2 |
| Gate-Source Voltage | VGSS | -20 | | 20 | V | TA = +25°C | 2 |
| Continuous Drain Current | ID | | | -174 | mA | VGS = -5V, Steady State, TA = +25°C, Note 6 | 2 |
| Continuous Drain Current | ID | | | -139 | mA | VGS = -5V, Steady State, TA = +70°C, Note 6 | 2 |
| Maximum Continuous Body Diode Forward Current | IS | | | -65 | mA | Note 6 | 2 |
| Pulsed Drain Current | IDM | | | -1 | A | 10µs Pulse, Duty Cycle = 1%, Note 6 | 2 |
| Total Power Dissipation | PD | | | 320 | mW | Note 5, TA = +25°C | 2 |
| Total Power Dissipation | PD | | | 470 | mW | Note 6, TA = +25°C | 2 |
| Operating and Storage Temperature Range | TJ, TSTG | -55 | | 150 | °C | | 2 |
| Thermal Resistance, Junction to Ambient | RθJA | | 398 | | °C/W | Note 5, Steady State | 2 |
| Thermal Resistance, Junction to Ambient | RθJA | | 273 | | °C/W | Note 6, Steady State | 2 |
| Input Capacitance | Ciss | | 24.6 | | pF | VDS = -25V, VGS = 0V, f = 1.0MHz | 2 |
| Output Capacitance | Coss | | 4.8 | | pF | VDS = -25V, VGS = 0V, f = 1.0MHz | 2 |
| Reverse Transfer Capacitance | Crss | | 2.8 | | pF | VDS = -25V, VGS = 0V, f = 1.0MHz | 2 |
| Gate Resistance | Rg | | 2000 | | Ω | f = 1.0MHz, VGS = 0V, VDS = 0V | 2 |
| Total Gate Charge (VGS = -4.5V) | Qg | | 280 | | pC | VGS = -4.5V, VDS = -10V, ID = -100mA | 2 |
| Total Gate Charge (VGS = -10V) | Qg | | 560 | | pC | VGS = -4.5V, VDS = -10V, ID = -100mA | 2 |
| Gate-Source Charge | Qgs | | 90 | | pC | VGS = -4.5V, VDS = -10V, ID = -100mA | 2 |
| Gate-Drain Charge | Qgd | | 77 | | pC | VGS = -4.5V, VDS = -10V, ID = -100mA | 2 |
| Turn-On Delay Time | tD(ON) | | 2.8 | | ns | VDD = -30V, ID = -0.27A, RGEN = 50, VGS = -10V | 2 |
| Turn-On Rise Time | tR | | 2.6 | | ns | VDD = -30V, ID = -0.27A, RGEN = 50, VGS = -10V | 2 |
| Turn-Off Delay Time | tD(OFF) | | 11.1 | | ns | VDD = -30V, ID = -0.27A, RGEN = 50, VGS = -10V | 2 |
| Turn-Off Fall Time | tF | | 7.2 | | ns | VDD = -30V, ID = -0.27A, RGEN = 50, VGS = -10V | 2 |
## Materials and finish
As the datasheet states them (page.json `metadata.appearance`; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | | tin | Terminals: Finish Matte Tin Annealed over Alloy 42 Leadframe. Solderable per MIL-STD-202, Method 208 | 1 |
## CAD (KiCad official)
- Symbol: `DMP510DLW-7`
- Footprint: `Package_TO_SOT_SMD:SOT-323_SC-70`
- 3D model: SOT-323 (KiCad packages3D, STEP)
- 3D model files: `dmp510dlw-7-etched.step` / `dmp510dlw-7-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `dmp510dlw-7.step` / `dmp510dlw-7.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Diodes Incorporated datasheet](https://www.diodes.com/assets/Datasheets/DMP510DLW-7.pdf) (7 pp, sha256 `d1a2e8567a6c38f0`, retrieved 2026-10-26, tier: manufacturer)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text+vision), consensus `claude-opus-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/dmp510dlw-7-datasheet.pdf)