component
DMP510DL-13
Public Made by Adomby adom
Diodes Incorporated MOSFETs, SOT-23-3. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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DMP510DL-13
Diodes Incorporated · MOSFETs · SOT-23-3
DMP510DL-13 from Diodes Incorporated, in a SOT-23-3. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | G | input | Gate; controls the channel, with VGS rated ±30 V and threshold VGS(TH) of -0.8 V to -2.0 V at ID = -1 mA. |
| 2 | S | passive | Source terminal of the P-channel MOSFET; body diode anode side, with continuous body diode current IS of -180 mA. |
| 3 | D | passive | Drain terminal; VDSS of -50 V and continuous drain current of -180 mA at TA = +25°C (-1.2 A pulsed). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Diodes Incorporated |
| Package | SOT-23-3 |
| Category | Triode/MOS Tube/Transistor |
| Pins | 3 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Drain-Source Voltage | VDSS | -50 | V | 2 | |||
| Gate-Source Voltage | VGSS | -30 | 30 | V | 2 | ||
| Continuous Drain Current, steady state | ID | -180 | mA | VGS = -5V, TA = +25°C | 2 | ||
| Continuous Drain Current, steady state | ID | -130 | mA | VGS = -5V, TA = +70°C | 2 | ||
| Maximum Continuous Body Diode Forward Current | IS | -180 | mA | Note 6 | 2 | ||
| Pulsed Drain Current | IDM | -1.2 | A | 10µs Pulse, Duty Cycle = 1% | 2 | ||
| Total Power Dissipation | PD | 310 | mW | Note 5: FR-4 PCB, minimum recommended pad layout | 2 | ||
| Total Power Dissipation | PD | 500 | mW | Note 6: 1in x 1in FR-4 PCB, high coverage 2oz copper, single sided | 2 | ||
| Thermal Resistance, Junction to Ambient, steady state | RθJA | 405 | °C/W | Note 5: FR-4 PCB, minimum recommended pad layout | 2 | ||
| Thermal Resistance, Junction to Ambient, steady state | RθJA | 251 | °C/W | Note 6: 1in x 1in FR-4 PCB, high coverage 2oz copper, single sided | 2 | ||
| Operating and Storage Temperature Range | TJ, TSTG | -55 | 150 | °C | 2 | ||
| Drain-Source Breakdown Voltage | BVDSS | -50 | V | VGS = 0V, ID = -250µA | 2 | ||
| Zero Gate Voltage Drain Current | IDSS | -1 | µA | VDS = -50V, VGS = 0V | 2 | ||
| Gate-Source Leakage | IGSS | 100 | nA | VGS = 20V, VDS = 0V | 2 | ||
| Gate Threshold Voltage | VGS(TH) | -0.8 | -2 | V | VDS = VGS, ID = -1mA | 2 | |
| Static Drain-Source On-Resistance | RDS(ON) | 10 | Ω | VGS = -5V, ID = -0.1A | 2 | ||
| Forward Transconductance | gFS | 0.25 | S | VDS = -25V, ID = -0.1A | 2 | ||
| Input Capacitance | Ciss | 24.6 | pF | 2 | |||
| Output Capacitance | Coss | 4.8 | pF | VDS = -25V, VGS = 0V, f = 1.0MHz | 2 | ||
| Reverse Transfer Capacitance | Crss | 2.8 | pF | 2 | |||
| Turn-On Delay Time | tD(ON) | 2.8 | ns | VDD = -30V, ID = -0.27A, RGEN = 50Ω, VGS = -10V | 2 | ||
| Turn-On Rise Time | tR | 2.6 | ns | 2 | |||
| Turn-Off Delay Time | tD(OFF) | 11.1 | ns | 2 | |||
| Turn-Off Fall Time | tF | 7.2 | ns | 2 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | tin | Terminals: Matte Tin Finish (Lead Free Plating). Solderable per MIL-STD-202, Method 208 | 1 |
CAD (KiCad official)
- Symbol:
DMP510DL-13 - Footprint:
Package_TO_SOT_SMD:SOT-23-3 - 3D model: SOT-23-3 (KiCad packages3D, STEP)
- 3D model files:
dmp510dl-13-etched.step/dmp510dl-13-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);dmp510dl-13.step/dmp510dl-13.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Diodes Incorporated datasheet (7 pp, sha256
c3a9b419fb3433f5, retrieved 2026-10-26, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text+vision), consensusclaude-opus-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# DMP510DL-13
**Diodes Incorporated** · MOSFETs · SOT-23-3
DMP510DL-13 from Diodes Incorporated, in a SOT-23-3. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | G | input | Gate; controls the channel, with VGS rated ±30 V and threshold VGS(TH) of -0.8 V to -2.0 V at ID = -1 mA. |
| 2 | S | passive | Source terminal of the P-channel MOSFET; body diode anode side, with continuous body diode current IS of -180 mA. |
| 3 | D | passive | Drain terminal; VDSS of -50 V and continuous drain current of -180 mA at TA = +25°C (-1.2 A pulsed). |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Diodes Incorporated |
| Package | SOT-23-3 |
| Category | Triode/MOS Tube/Transistor |
| Pins | 3 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Drain-Source Voltage | VDSS | | | -50 | V | | 2 |
| Gate-Source Voltage | VGSS | -30 | | 30 | V | | 2 |
| Continuous Drain Current, steady state | ID | | | -180 | mA | VGS = -5V, TA = +25°C | 2 |
| Continuous Drain Current, steady state | ID | | | -130 | mA | VGS = -5V, TA = +70°C | 2 |
| Maximum Continuous Body Diode Forward Current | IS | | | -180 | mA | Note 6 | 2 |
| Pulsed Drain Current | IDM | | | -1.2 | A | 10µs Pulse, Duty Cycle = 1% | 2 |
| Total Power Dissipation | PD | | | 310 | mW | Note 5: FR-4 PCB, minimum recommended pad layout | 2 |
| Total Power Dissipation | PD | | | 500 | mW | Note 6: 1in x 1in FR-4 PCB, high coverage 2oz copper, single sided | 2 |
| Thermal Resistance, Junction to Ambient, steady state | RθJA | | | 405 | °C/W | Note 5: FR-4 PCB, minimum recommended pad layout | 2 |
| Thermal Resistance, Junction to Ambient, steady state | RθJA | | | 251 | °C/W | Note 6: 1in x 1in FR-4 PCB, high coverage 2oz copper, single sided | 2 |
| Operating and Storage Temperature Range | TJ, TSTG | -55 | | 150 | °C | | 2 |
| Drain-Source Breakdown Voltage | BVDSS | -50 | | | V | VGS = 0V, ID = -250µA | 2 |
| Zero Gate Voltage Drain Current | IDSS | | | -1 | µA | VDS = -50V, VGS = 0V | 2 |
| Gate-Source Leakage | IGSS | | | 100 | nA | VGS = 20V, VDS = 0V | 2 |
| Gate Threshold Voltage | VGS(TH) | -0.8 | | -2 | V | VDS = VGS, ID = -1mA | 2 |
| Static Drain-Source On-Resistance | RDS(ON) | | | 10 | Ω | VGS = -5V, ID = -0.1A | 2 |
| Forward Transconductance | gFS | | 0.25 | | S | VDS = -25V, ID = -0.1A | 2 |
| Input Capacitance | Ciss | | 24.6 | | pF | | 2 |
| Output Capacitance | Coss | | 4.8 | | pF | VDS = -25V, VGS = 0V, f = 1.0MHz | 2 |
| Reverse Transfer Capacitance | Crss | | 2.8 | | pF | | 2 |
| Turn-On Delay Time | tD(ON) | | 2.8 | | ns | VDD = -30V, ID = -0.27A, RGEN = 50Ω, VGS = -10V | 2 |
| Turn-On Rise Time | tR | | 2.6 | | ns | | 2 |
| Turn-Off Delay Time | tD(OFF) | | 11.1 | | ns | | 2 |
| Turn-Off Fall Time | tF | | 7.2 | | ns | | 2 |
## Materials and finish
As the datasheet states them (page.json `metadata.appearance`; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | | tin | Terminals: Matte Tin Finish (Lead Free Plating). Solderable per MIL-STD-202, Method 208 | 1 |
## CAD (KiCad official)
- Symbol: `DMP510DL-13`
- Footprint: `Package_TO_SOT_SMD:SOT-23-3`
- 3D model: SOT-23-3 (KiCad packages3D, STEP)
- 3D model files: `dmp510dl-13-etched.step` / `dmp510dl-13-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `dmp510dl-13.step` / `dmp510dl-13.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Diodes Incorporated datasheet](https://www.diodes.com/assets/Datasheets/DMP510DL-13.pdf) (7 pp, sha256 `c3a9b419fb3433f5`, retrieved 2026-10-26, tier: manufacturer)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text+vision), consensus `claude-opus-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/dmp510dl-13-datasheet.pdf)