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Ray Publish 0.1.0 65dc213 1d ago

DMP4050SSS-HXY

HXY MOSFET · MOSFETs · SOP-8

DMP4050SSS-HXY from HXY MOSFET, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 S passive Source of the P-channel MOSFET, tied internally with the other source pins; VDS rating is -40V and continuous drain current is -13A.
2 S passive Source of the P-channel MOSFET, tied internally with the other source pins; VDS rating is -40V and continuous drain current is -13A.
3 S passive Source of the P-channel MOSFET, tied internally with the other source pins; VDS rating is -40V and continuous drain current is -13A.
4 G input Gate of the P-channel MOSFET; gate-source voltage is limited to ±20V and the device operates with gate voltages as low as 2.5V (threshold -1.0 to -2.2V).
5 D passive Drain of the P-channel MOSFET, tied internally with the other drain pins; VDS is -40V maximum and RDS(on) is below 19mΩ at VGS=-10V.
6 D passive Drain of the P-channel MOSFET, tied internally with the other drain pins; VDS is -40V maximum and RDS(on) is below 19mΩ at VGS=-10V.
7 D passive Drain of the P-channel MOSFET, tied internally with the other drain pins; VDS is -40V maximum and RDS(on) is below 19mΩ at VGS=-10V.
8 D passive Drain of the P-channel MOSFET, tied internally with the other drain pins; VDS is -40V maximum and RDS(on) is below 19mΩ at VGS=-10V.

Key specifications

Parameter Value
Manufacturer HXY MOSFET
Package SOP-8
Category Triode/MOS Tube/Transistor
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Drain-Source Voltage VDS -40 V 1
Gate-Source Voltage VGS -20 20 V 1
Drain Current ID -13 A ID@TA=25℃, VGS @ 10V 1
Pulsed Drain Current IDM -52 A Note 1: repetitive rating, pulse width limited by TJ(MAX)=150°C 1
Total Power Dissipation PD 3 W PD@TA=25℃ 1
Storage Temperature Range TSTG -55 150 ℃ 1
Operating Junction Temperature Range TJ -55 150 ℃ 1
Maximum Thermal Resistance, Junction-ambient Rthj-a 41 ℃/W Note 3: surface mounted on 1 inch2 FR-4 board with 2OZ copper 1
Drain-Source Breakdown Voltage V(BR)DSS -40 V VGS = 0V, ID = -250µA 2
Gate-body Leakage current lGSS -100 100 nA VDS = 0V, VGS = ±20V 2
Zero Gate Voltage Drain Current, TJ=25℃ IDSS -1 μA VDS = -40V, VGS = 0V 2
Zero Gate Voltage Drain Current, TJ=100℃ IDSS -100 μA TJ=100℃; VDS = -40V, VGS = 0V 2
Gate-Threshold Voltage VGS(th) -1 -1.5 -2.2 V VDS = VGS, ID = -250µA 2
Drain-Source On-Resistance (VGS=-10V) RDS(on) 14 19 mΩ VGS = -10V, ID = -10A 2
Drain-Source On-Resistance (VGS=-4.5V) RDS(on) 19.5 25 mΩ VGS = -4.5V, ID = -5 A 2
Diode Forward Voltage VSD -1.2 V IS = -10A, VGS = 0V 2
Continuous Source Current IS -13 A TC=25°C 2
Forward Transconductance gfs 44 S VDS = -10V, ID = -10A 2
Input Capacitance Ciss 2525 pF VDS = -20V, VGS =0V, f =1MHz 2
Output Capacitance Coss 190 pF 2
Reverse Transfer Capacitance Crss 172 pF 2
Gate Resistance Rg 10 Ω f =1MHz 2
Total Gate Charge Qg 35 nC VGS = -10V,VDS = -20V, ID= -10A 2
Gate-Source Charge Qgs 5.5 nC 2
Gate-Drain Charge Qgd 8 nC 2
Turn-On Delay Time td(on) 14.5 ns VGS = -10V, VDD = -20V, RG = 3Ω, ID= -10A 2
Rise Time tr 20.2 ns 2
Turn-Off Delay Time td(off) 32 ns 2
Fall Time tf 10 ns 2

CAD (KiCad official)

  • Symbol: DMP4050SSS-HXY
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOP-8 (KiCad packages3D, STEP)
  • 3D model files: dmp4050sss-hxy-etched.step / dmp4050sss-hxy-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); dmp4050sss-hxy.step / dmp4050sss-hxy.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: HXY MOSFET datasheet (7 pp, sha256 8247b752fad080a8, retrieved 2026-11-05, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text+vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF