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DMP4025LSS-13

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Diodes Incorporated MOSFETs, SO-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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DMP4025LSS-13

Diodes Incorporated · MOSFETs · SO-8

DMP4025LSS-13 from Diodes Incorporated, in a SO-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 S passive Source of the P-channel MOSFET, tied to pins 2 and 3 (device rated VDSS -40V, continuous ID -8.0A).
2 S passive Source of the P-channel MOSFET, tied to pins 1 and 3 (device rated VDSS -40V, continuous ID -8.0A).
3 S passive Source of the P-channel MOSFET, tied to pins 1 and 2 (device rated VDSS -40V, continuous ID -8.0A).
4 G input Gate of the P-channel MOSFET, with VGSS rating of ±20V and threshold VGS(th) of -0.8V min to -1.8V max.
5 D passive Drain of the P-channel MOSFET, tied to pins 6, 7 and 8 (RDS(on) max 25mΩ at VGS=-10V).
6 D passive Drain of the P-channel MOSFET, tied to pins 5, 7 and 8 (RDS(on) max 25mΩ at VGS=-10V).
7 D passive Drain of the P-channel MOSFET, tied to pins 5, 6 and 8 (RDS(on) max 25mΩ at VGS=-10V).
8 D passive Drain of the P-channel MOSFET, tied to pins 5, 6 and 7 (RDS(on) max 25mΩ at VGS=-10V).

Key specifications

Parameter Value
Manufacturer Diodes Incorporated
Package SO-8
Category Triode/MOS Tube/Transistor
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Drain-Source Breakdown Voltage BVDSS -40 V ID = -250μA, VGS = 0V 4
Zero Gate Voltage Drain Current IDSS -1 μA VDS = -40V, VGS = 0V 4
Gate-Source Leakage IGSS -100 100 nA VGS = ±20V, VDS = 0V 4
Gate Threshold Voltage VGS(th) -0.8 -1.3 -1.8 V ID = -250μA, VDS = VGS 4
Static Drain-Source On-Resistance RDS (ON) 18 25 mΩ VGS = -10V, ID = -3A 4
Static Drain-Source On-Resistance RDS (ON) 30 45 mΩ VGS = -4.5V, ID = -3A 4
Diode Forward Voltage VSD -0.7 -1 V IS = -1A, VGS = 0V 4
Drain-Source Voltage VDSS -40 V TA = 25°C 2
Gate-Source Voltage VGSS -20 20 V TA = 25°C 2
Continuous Drain Current ID -8 A VGS = -10V, TA = 25°C (Notes 6) 2
Continuous Drain Current ID -6.9 A VGS = -10V, TA = 70°C (Notes 6) 2
Continuous Drain Current ID -6 A VGS = -10V (Notes 5) 2
Pulsed Drain Current IDM -30 A VGS = -10V (Notes 7) 2
Continuous Source Current (Body diode) IS -8 A (Notes 7) 2
Pulsed Source Current (Body diode) ISM -30 A (Notes 7) 2
Power Dissipation PD 1.52 W TA = 25°C (Notes 5) 2
Power Dissipation PD 2.4 W TA = 25°C (Notes 6) 2
Thermal Resistance, Junction to Ambient RθJA 82 °C/W (Notes 5) 2
Thermal Resistance, Junction to Ambient RθJA 52 °C/W (Notes 6) 2
Thermal Resistance, Junction to Lead RθJL 48.85 °C/W (Notes 8) 2
Operating and Storage Temperature Range TJ, TSTG -55 150 °C 2
Forward Transconductance gfs 16.6 S VDS = -5V, ID = -3A 4
Input Capacitance Ciss 1640 pF VDS = -20V, VGS = 0V, f = 1MHz 4
Output Capacitance Coss 179 pF VDS = -20V, VGS = 0V, f = 1MHz 4
Reverse Transfer Capacitance Crss 128 pF VDS = -20V, VGS = 0V, f = 1MHz 4
Gate Resistance Rg 6.43 Ω VDS = 0V, VGS = 0V, f = 1MHz 4
Total Gate Charge Qg 14 nC VGS = -4.5V, VDS = -20V, ID = -3A 4
Total Gate Charge Qg 33.7 nC VGS = -10V, VDS = -20V, ID = -3A 4
Gate-Source Charge Qgs 5.5 nC VGS = -10V, VDS = -20V, ID = -3A 4
Gate-Drain Charge Qgd 7.3 nC VGS = -10V, VDS = -20V, ID = -3A 4
Turn-On Delay Time tD(on) 6.9 ns VDD = -20V, VGS = -10V, ID = -3A 4
Turn-On Rise Time tr 14.7 ns VDD = -20V, VGS = -10V, ID = -3A 4
Turn-Off Delay Time tD(off) 53.7 ns VDD = -20V, VGS = -10V, ID = -3A 4
Turn-Off Fall Time tf 30.9 ns VDD = -20V, VGS = -10V, ID = -3A 4

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part Material Colour / plating Datasheet says Page
contacts Copper tin • Terminals: Finish - Matte Tin annealed over Copper lead frame. 1

CAD (KiCad official)

  • Symbol: DMP4025LSS-13
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SO-8 (KiCad packages3D, STEP)
  • 3D model files: dmp4025lss-13-etched.step / dmp4025lss-13-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); dmp4025lss-13.step / dmp4025lss-13.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Diodes Incorporated datasheet (8 pp, sha256 3464468c6ccc6d61, retrieved 2026-10-26, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text+vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF