# DMP32D4SW-7

**Diodes Incorporated** · MOSFETs · SOT-323

DMP32D4SW-7 from Diodes Incorporated, in a SOT-323. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | G | input | Gate, ESD-protected via an internal gate protection diode; VGSS rating is ±20 V and threshold VGS(TH) is -1.4 V to -2.4 V. |
| 2 | S | passive | Source of the P-channel MOSFET, connected internally to the body diode anode and gate protection diode. |
| 3 | D | passive | Drain of the P-channel MOSFET with VDSS of -30 V and continuous drain current of -250 mA at TA = +25°C. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Diodes Incorporated |
| Package | SOT-323 |
| Category | Transistors |
| Pins | 3 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Drain-Source Voltage | VDSS | -30 |  |  | V |  | 2 |
| Gate-Source Voltage | VGSS | -20 |  | 20 | V |  | 2 |
| Continuous Drain Current | ID | -250 |  |  | mA | VGS = -10V, TA = +25°C | 2 |
| Continuous Drain Current | ID | -200 |  |  | mA | VGS = -10V, TA = +70°C | 2 |
| Pulsed Drain Current | IDM | -1 |  |  | A | Note 6 | 2 |
| Total Power Dissipation | PD |  |  | 300 | mW | Note 5, FR-4 PC board, minimum recommended pad layout | 2 |
| Total Power Dissipation | PD |  |  | 432 | mW | Note 6, FR-4, 2oz copper, 1 inch square pad | 2 |
| Thermal Resistance, Junction to Ambient | RθJA |  |  | 398 | °C/W | Note 5, FR-4 PC board, minimum recommended pad layout | 2 |
| Thermal Resistance, Junction to Ambient | RθJA |  |  | 290 | °C/W | Note 6, FR-4, 2oz copper, 1 inch square pad | 2 |
| Thermal Resistance, Junction to Case | RθJC |  |  | 142 | °C/W | Note 5 | 2 |
| Operating and Storage Temperature Range | TJ, TSTG | -55 |  | 150 | °C |  | 2 |
| Drain-Source Breakdown Voltage | BVDSS | -30 |  |  | V | VGS = 0V, ID = -1mA | 2 |
| Zero Gate Voltage Drain Current | IDSS |  |  | -1 | µA | TJ = +25°C, VDS = -30V, VGS = 0V | 2 |
| Gate-Source Leakage | IGSS | -10 |  | 10 | µA | VGS = ±16V, VDS = 0V | 2 |
| Gate Threshold Voltage | VGS(TH) | -1.4 |  | -2.4 | V | VDS = VGS, ID = -250μA | 2 |
| Static Drain-Source On-Resistance | RDS(ON) |  |  | 2.4 | Ω | VGS = -10V, ID = -0.5A | 2 |
| Static Drain-Source On-Resistance | RDS(ON) |  |  | 4 | Ω | VGS = -4.5V, ID = -0.3A | 2 |
| Diode Forward Voltage | VSD |  | -0.8 | -1.2 | V | VGS = 0V, IS = -300mA | 2 |

## Materials and finish

As the datasheet states them (page.json `metadata.appearance`; the 3D model's colours follow it).

| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts |  | tin |  Lead Free Plating (Matte Tin Finish Annealed over Alloy 42 Leadframe). | 1 |

## CAD (KiCad official)

- Symbol: `DMP32D4SW-7`
- Footprint: `Package_TO_SOT_SMD:SOT-323_SC-70`
- 3D model: SOT-323 (KiCad packages3D, STEP)
- 3D model files: `dmp32d4sw-7-etched.step` / `dmp32d4sw-7-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `dmp32d4sw-7.step` / `dmp32d4sw-7.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Diodes Incorporated datasheet](https://www.diodes.com/assets/Datasheets/DMP32D4SW-7.pdf) (6 pp, sha256 `7a7316b248509360`, retrieved 2026-11-04, tier: manufacturer)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text+vision), consensus `claude-opus-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/dmp32d4sw-7-datasheet.pdf)