DMP3097LQ-7 from Diodes Incorporated, in a SOT-23-3. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model). Symbol and footprint from KiCad-official CAD; the 3D model is generated from the datasheet's package dimensions.

Pinout

Pin	Name	Type	Function
1	G	input	Gate; controls the channel, with VGS(TH) of -1.0V to -2.1V and an absolute maximum gate-source voltage of ±20V.
2	S	passive	Source terminal of the P-channel MOSFET, with a continuous drain current rating of -3.9A at TA=+25°C and VGS=-10V.
3	D	passive	Drain terminal, rated for a drain-source voltage of -30V and a pulsed drain current of -20A.

Key specifications

Parameter	Value
Manufacturer	Diodes Incorporated
Package	SOT-23-3
Category	Triode/MOS Tube/Transistor
Pins	3

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter	Symbol	Min	Typ	Max	Unit	Conditions	Page
Drain-Source Voltage	VDSS	-30			V		2
Gate-Source Voltage	VGSS	-20		20	V		2
Drain Current (steady state)	ID	-3.9			A	VGS = -10V, steady state, TA = +25°C	2
Drain Current (steady state)	ID	-3.1			A	VGS = -10V, steady state, TA = +70°C	2
Pulsed Drain Current	IDM	-20			A	10µs pulse, duty cycle = 1%	2
Total Power Dissipation	PD			1	W	Note 5: FR-4 PCB, 2oz copper, minimum recommended pad layout, TA = +25°C	2
Total Power Dissipation	PD			1.52	W	Note 6: FR-4 PCB, 2oz copper, 1 inch square copper plate, TA = +25°C	2
Thermal Resistance, Junction to Ambient	RθJA			123	°C/W	Note 5: FR-4 PCB, minimum recommended pad layout, TA = +25°C	2
Thermal Resistance, Junction to Ambient	RθJA			82	°C/W	Note 6: FR-4 PCB, 1 inch square copper plate, TA = +25°C	2
Operating and Storage Temperature Range	TJ, TSTG	-55		150	°C		2
Drain-Source Breakdown Voltage	BVDSS	-30			V	VGS = 0V, ID = -250µA	2
Zero Gate Voltage Drain Current	IDSS			-800	nA	VDS = -30V, VGS = 0V	2
Gate-Source Leakage	IGSS	-100		100	nA	VGS = ±20V, VDS = 0V	2
Gate Threshold Voltage	VGS(TH)	-1		-2.1	V	VDS = VGS, ID = -250µA	2
Static Drain-Source On-Resistance	RDS(ON)		53	65	mΩ	VGS = -10V, ID = -3.8A	2
Static Drain-Source On-Resistance	RDS(ON)		74	99	mΩ	VGS = -4.5V, ID = -3.0A	2
Diode Forward Voltage	VSD		-0.85	-1.26	V	VGS = 0V, IS = -2.7A	2

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part	Material	Colour / plating	Datasheet says	Page
contacts	Copper	tin	• Terminals: FinishMatte Tin Annealed over Copper Lead-Frame.	1

CAD (land: KiCad; 3D: generated from the datasheet)

Symbol: DMP3097LQ-7
Footprint: Package_TO_SOT_SMD:SOT-23-3
3D model: SOT-23-3, generated on the KiCad land (body 1.3 x 2.9 mm, terminals on the pads, 1.025 mm tall, datasheet A, nominal). KiCad's stock model for this land is taller than the datasheet allows, so the model is generated from the datasheet drawing; the dimensions come from the datasheet drawing where it was read and are defaults otherwise (see provenance.model_3d_generated), not the manufacturer's CAD (STEP)
3D model files: dmp3097lq-7-etched.step / dmp3097lq-7-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); dmp3097lq-7.step / dmp3097lq-7.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Diodes Incorporated datasheet (7 pp, sha256 ed3c44c758999ada, retrieved 2026-11-13, tier: manufacturer)
Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text+vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: land: KiCad official libraries (CC-BY-SA 4.0); 3D: generated from the datasheet's package dimensions (provenance.model_3d_generated).

Datasheet PDF

DMP3097LQ-7

Verified DMP3097LQ-7

Verification log 1 record

3D Model

Symbol & Footprint

Schematic Symbol

PCB Footprint

Datasheet

README