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DMP3056LSSQ-13

Diodes Incorporated · MOSFETs · SO-8

DMP3056LSSQ-13 from Diodes Incorporated, in a SO-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 S passive Source terminal of the single P-channel enhancement-mode MOSFET; device VDSS is -30 V (Maximum Ratings).
2 S passive Source terminal of the single P-channel enhancement-mode MOSFET; device VDSS is -30 V (Maximum Ratings).
3 S passive Source terminal of the single P-channel enhancement-mode MOSFET; device VDSS is -30 V (Maximum Ratings).
4 G input Gate terminal of the MOSFET; device VGSS is ±20 V and VGS(TH) is -1.0 V to -2.1 V (Electrical Characteristics).
5 D passive Drain terminal of the MOSFET; device continuous drain current ID is -4.9 A at TA = +25°C with VGS = -10 V (Maximum Ratings).
6 D passive Drain terminal of the MOSFET; device continuous drain current ID is -4.9 A at TA = +25°C with VGS = -10 V (Maximum Ratings).
7 D passive Drain terminal of the MOSFET; device continuous drain current ID is -4.9 A at TA = +25°C with VGS = -10 V (Maximum Ratings).
8 D passive Drain terminal of the MOSFET; device continuous drain current ID is -4.9 A at TA = +25°C with VGS = -10 V (Maximum Ratings).

Key specifications

Parameter Value
Manufacturer Diodes Incorporated
Package SO-8
Category Transistors/Thyristors
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Drain-Source Breakdown Voltage BVDSS -30 V VGS = 0V, ID = -250μA 2
Zero Gate Voltage Drain Current IDSS -1 μA TJ = +25°C, VDS = -30V, VGS = 0V 2
Gate-Source Leakage IGSS -100 100 nA VGS = ±20V, VDS = 0V 2
Gate Threshold Voltage VGS(TH) -1 -2.1 V VDS = VGS, ID = -250μA 2
Static Drain-Source On-Resistance RDS(ON) 25 45 mΩ VGS = -10V, ID = -6A 2
Static Drain-Source On-Resistance RDS(ON) 39 65 mΩ VGS = -4.5V, ID = -5A 2
Diode Forward Voltage VSD -0.75 -1.2 V VGS = 0V, IS = -1A 2
Drain-Source Voltage VDSS -30 V 2
Gate-Source Voltage VGSS -20 20 V 2
Continuous Drain Current ID -4.9 A VGS = -10V, TA = +25°C 2
Continuous Drain Current ID -3.9 A VGS = -10V, TA = +70°C 2
Pulsed Drain Current IDM -25 A 10µs Pulse, Duty Cycle = 1% 2
Avalanche Current IAS -17 A L = 0.1mH 2
Avalanche Energy EAS 15 mJ L = 0.1mH 2
Operating and Storage Temperature Range TJ, TSTG -55 150 °C 2
Total Power Dissipation PD 1.2 W TA = +25°C, Note 5 2
Total Power Dissipation PD 0.8 W TA = +70°C, Note 5 2
Thermal Resistance, Junction to Ambient RθJA 100 °C/W Steady State, Note 5 2
Thermal Resistance, Junction to Ambient RθJA 58 °C/W t<10s, Note 5 2
Total Power Dissipation PD 1.6 W TA = +25°C, Note 6 2
Total Power Dissipation PD 1 W TA = +70°C, Note 6 2
Thermal Resistance, Junction to Ambient RθJA 77 °C/W Steady State, Note 6 2
Thermal Resistance, Junction to Ambient RθJA 45 °C/W t<10s, Note 6 2
Thermal Resistance, Junction to Case RθJC 10 °C/W Note 6 2

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part Material Colour / plating Datasheet says Page
housing PC Body Diode Reverse Recovery Charge QRR, 3.4, nC IS = -7A, dI/dt = 100A/μs Notes: 5. Device mounted on FR-4 PC board, with minimum recommended pad layout, single sided. 2

CAD (KiCad official)

  • Symbol: DMP3056LSSQ-13
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SO-8 (KiCad packages3D, STEP)
  • 3D model files: dmp3056lssq-13-etched.step / dmp3056lssq-13-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); dmp3056lssq-13.step / dmp3056lssq-13.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Diodes Incorporated datasheet (6 pp, sha256 ea012447bce94a6d, retrieved 2026-10-20, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF