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DMP3056LSS-13

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Diodes Incorporated MOSFETs, SO-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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DMP3056LSS-13

Diodes Incorporated · MOSFETs · SO-8

DMP3056LSS-13 from Diodes Incorporated, in a SO-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 S passive Source of the P-channel MOSFET, tied internally to pins 2 and 3.
2 S passive Source of the P-channel MOSFET, tied internally to pins 1 and 3.
3 S passive Source of the P-channel MOSFET, tied internally to pins 1 and 2.
4 G input Gate of the P-channel MOSFET; VGSS rating is ±20 V and threshold VGS(th) is -1 V min to -2.1 V max at ID = -250 µA.
5 D passive Drain of the P-channel MOSFET, tied internally to pins 6, 7 and 8; VDSS is -30 V.
6 D passive Drain of the P-channel MOSFET, tied internally to pins 5, 7 and 8; VDSS is -30 V.
7 D passive Drain of the P-channel MOSFET, tied internally to pins 5, 6 and 8; VDSS is -30 V.
8 D passive Drain of the P-channel MOSFET, tied internally to pins 5, 6 and 7; VDSS is -30 V.

Key specifications

Parameter Value
Manufacturer Diodes Incorporated
Package SO-8
Category Transistors
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Drain-Source Voltage VDSS -30 V TA = 25°C 1
Gate-Source Voltage VGSS -20 20 V TA = 25°C 1
Drain Current, steady state ID -7.1 A TA = 25°C, Note 1 1
Drain Current, steady state ID -6 A TA = 70°C, Note 1 1
Pulsed Drain Current IDM -20 A Pulse width ≤10μS, Duty Cycle ≤1% 1
Total Power Dissipation PD 2.5 W Note 1 1
Thermal Resistance, Junction to Ambient RθJA 50 °C/W Note 1 1
Operating and Storage Temperature Range TJ, TSTG -55 150 °C 1
Drain-Source Breakdown Voltage BVDSS -30 V VGS = 0V, ID = -250μA 2
Zero Gate Voltage Drain Current IDSS -1 μA VDS = -30V, VGS = 0V 2
Gate-Source Leakage IGSS 100 nA VGS = ±20V, VDS = 0V 2
Gate-Source Leakage IGSS 800 nA VGS = ±25V, VDS = 0V 2
Gate Threshold Voltage VGS(th) -1 1.7 -2.1 V VDS = VGS, ID = -250μA 2
Static Drain-Source On-Resistance RDS(ON) 45 mΩ VGS = -10V, ID = -6.0A 2
Static Drain-Source On-Resistance RDS(ON) 65 mΩ VGS = -4.5V, ID = -5.0A 2
Diode Forward Voltage VSD -0.5 -1.2 V VGS = 0V, IS = -1.7A 2
Forward Transconductance gfs 8 S VDS = -10V, ID = -5.3A 2
Input Capacitance Ciss 722 pF VDS = -25V, VGS = 0V, f = 1.0MHz 2
Output Capacitance Coss 114 pF VDS = -25V, VGS = 0V, f = 1.0MHz 2
Reverse Transfer Capacitance Crss 92 pF VDS = -25V, VGS = 0V, f = 1.0MHz 2
Gate Resistance RG 3.3 Ω VDS = 0V, VGS = 0V, f = 1.0MHz 2

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part Material Colour / plating Datasheet says Page
contacts Copper tin • Terminals Connections: See Diagram • Terminals: Finish - Matte Tin annealed over Copper lead 1

CAD (KiCad official)

  • Symbol: DMP3056LSS-13
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SO-8 (KiCad packages3D, STEP)
  • 3D model files: dmp3056lss-13-etched.step / dmp3056lss-13-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); dmp3056lss-13.step / dmp3056lss-13.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Diodes Incorporated datasheet (4 pp, sha256 6f4d56e03f32471a, retrieved 2026-10-22, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text+vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF