main
Download ZIP Propose a change
Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs Publish 0.1.0 · Ray 17d ago
viewers dmp3050lvt-7: viewers · Ray 17d ago
dmp3050lvt-7-etched.glb Publish 0.1.0 · Ray 17d ago
dmp3050lvt-7-etched.step dmp3050lvt-7: factory component page (tier=lcsc) · Ray 17d ago
dmp3050lvt-7-hero.glb dmp3050lvt-7: hero GLB from the etched model (keeps the MPN mark) · Ray 17d ago
dmp3050lvt-7-hero.overlay.json Publish 0.1.0 · Ray 17d ago
dmp3050lvt-7.glb Publish 0.1.0 · Ray 17d ago
dmp3050lvt-7.kicad_mod Publish 0.1.0 · Ray 17d ago
dmp3050lvt-7.kicad_sym Publish 0.1.0 · Ray 17d ago
dmp3050lvt-7.lbr Publish 0.1.0 · Ray 17d ago
dmp3050lvt-7.step Publish 0.1.0 · Ray 17d ago
package.json Publish 0.1.0 · Ray 17d ago
page.json Set visibility: public · Ray 17d ago
README.md Publish 0.1.0 · Ray 17d ago

DMP3050LVT-7

Diodes Incorporated · MOSFETs · TSOT-26

DMP3050LVT-7 from Diodes Incorporated, in a TSOT-26. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 D passive Drain terminal of the P-channel MOSFET; device drain-source voltage is limited to -30 V (VDSS) and continuous drain current to -4.5 A at TA = +25°C in steady state.
2 D passive Drain terminal of the P-channel MOSFET; device drain-source voltage is limited to -30 V (VDSS) and continuous drain current to -4.5 A at TA = +25°C in steady state.
3 G input Gate terminal; gate-source voltage is limited to ±25 V (VGSS), with AEC-Q101 qualified parts limited to ±20 V.
4 S passive Source terminal of the P-channel MOSFET; maximum continuous body diode forward current is -2 A (IS).
5 D passive Drain terminal of the P-channel MOSFET; device drain-source voltage is limited to -30 V (VDSS) and continuous drain current to -4.5 A at TA = +25°C in steady state.
6 D passive Drain terminal of the P-channel MOSFET; device drain-source voltage is limited to -30 V (VDSS) and continuous drain current to -4.5 A at TA = +25°C in steady state.

Key specifications

Parameter Value
Manufacturer Diodes Incorporated
Package TSOT-26
Category Transistors/Thyristors
Pins 6

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Drain-Source Breakdown Voltage BVDSS -30 V VGS = 0V, ID = -250μA 2
Zero Gate Voltage Drain Current IDSS -1 μA VDS = -30V, VGS = 0V 2
Gate-Source Leakage IGSS -100 100 nA VGS = ±20V, VDS = 0V 2
Gate Threshold Voltage VGS(TH) -1 -2 V VDS = VGS, ID = -250μA 2
Static Drain-Source On-Resistance RDS(ON) 36 50 mΩ VGS = -10V, ID = -4.5A 2
Static Drain-Source On-Resistance RDS(ON) 56 75 mΩ VGS = -4.5V, ID = -3A 2
Diode Forward Voltage VSD -0.7 -1 V VGS = 0V, IS = -1A 2
Drain-Source Voltage VDSS -30 V 2
Gate-Source Voltage VGSS -25 25 V 2
Continuous Drain Current ID -4.5 A VGS = -10V, steady state, TA = +25°C 2
Continuous Drain Current ID -3.5 A VGS = -10V, steady state, TA = +70°C 2
Continuous Drain Current ID -5.2 A VGS = -10V, t<10s, TA = +25°C 2
Continuous Drain Current ID -4.1 A VGS = -10V, t<10s, TA = +70°C 2
Maximum Continuous Body Diode Forward Current IS -2 A Note 6 2
Pulsed Drain Current IDM -25 A 10s pulse, duty cycle = 1% 2
Total Power Dissipation PD 1.6 W TA = +25°C, Note 6 2
Total Power Dissipation PD 1 W TA = +70°C, Note 6 2
Thermal Resistance, Junction to Ambient RθJA 78 °C/W Steady state, Note 6 2
Thermal Resistance, Junction to Ambient RθJA 49 °C/W t<10s, Note 6 2
Thermal Resistance, Junction to Case RθJC 13 °C/W Steady state, Note 6 2
Operating and Storage Temperature Range TJ, TSTG -55 150 °C 2

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part Material Colour / plating Datasheet says Page
contacts Copper tin  Terminal Connections Indicator: See Diagram  Terminals: Finish  Matte Tin Annealed over Copper Leadframe. 1

CAD (KiCad official)

  • Symbol: DMP3050LVT-7
  • Footprint: Package_TO_SOT_SMD:TSOT-23-6
  • 3D model: TSOT-26 (KiCad packages3D, STEP)
  • 3D model files: dmp3050lvt-7-etched.step / dmp3050lvt-7-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); dmp3050lvt-7.step / dmp3050lvt-7.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Diodes Incorporated datasheet (7 pp, sha256 c75b2e393c04c73f, retrieved 2026-10-16, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF