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DMP3020LSS-13

Public Made by Adom

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Diodes Incorporated MOSFETs, SO-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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DMP3020LSS-13

Diodes Incorporated · MOSFETs · SO-8

DMP3020LSS-13 from Diodes Incorporated, in a SO-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 S passive Source of the P-channel MOSFET, shown on the left side of the top-view schematic at pin 1.
2 S passive Source of the P-channel MOSFET, shown on the left side of the top-view schematic at pin 2.
3 S passive Source of the P-channel MOSFET, shown on the left side of the top-view schematic at pin 3.
4 G input Gate of the P-channel MOSFET, with a gate-source voltage rating of 25 V and a threshold of -1 to -2 V.
5 D passive Drain of the P-channel MOSFET (-30 V VDSS), shown on the right side of the top-view schematic.
6 D passive Drain of the P-channel MOSFET (-30 V VDSS), shown on the right side of the top-view schematic.
7 D passive Drain of the P-channel MOSFET (-30 V VDSS), shown on the right side of the top-view schematic.
8 D passive Drain of the P-channel MOSFET (-30 V VDSS), shown on the right side of the top-view schematic.

Key specifications

Parameter Value
Manufacturer Diodes Incorporated
Package SO-8
Category Transistors/Thyristors
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Drain-Source Breakdown Voltage BVDSS -30 V VGS = 0V, ID = -250μA 2
Zero Gate Voltage Drain Current IDSS -1 μA VDS = -30V, VGS = 0V 2
Gate-Source Leakage IGSS 100 nA VGS = 20V, VDS = 0V 2
Gate-Source Leakage IGSS 800 nA VGS = 25V, VDS = 0V 2
Gate Threshold Voltage VGS(TH) -1 -2 V VDS = VGS, ID = -250μA 2
Static Drain-Source On-Resistance RDS(ON) 11.6 14 mΩ VGS = -10V, ID = -8A 2
Static Drain-Source On-Resistance RDS(ON) 18.6 25 mΩ VGS = -4.5V, ID = -5A 2
Diode Forward Voltage VSD -0.5 -1.1 V VGS = 0V, IS = -2A 2
Drain-Source Voltage VDSS -30 V 2
Gate-Source Voltage VGSS 25 V 2
Drain Current (steady state) ID -12 A TA = +25°C 2
Drain Current (steady state) ID -9 A TA = +70°C 2
Pulsed Drain Current IDM -80 A Note 6: pulse width 10μs, duty cycle 1% 2
Total Power Dissipation PD 2.5 W Note 5: 2 oz. copper pads on FR-4 PCB 2
Operating and Storage Temperature Range TJ, TSTG -55 150 °C 2
Thermal Resistance, Junction to Ambient RθJA 50 °C/W Note 5: device mounted on 2 oz. copper pads on FR-4 PCB 2
Thermal Resistance, Junction to Ambient RθJA 87 °C/W Fig. 10 transient thermal response label: DUT on 1*MRP Board 4

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part Material Colour / plating Datasheet says Page
contacts Copper tin  Terminals Connections: See Diagram  Terminals: Finish - Matte Tin Annealed over Copper Lead 1

CAD (KiCad official)

  • Symbol: DMP3020LSS-13
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SO-8 (KiCad packages3D, STEP)
  • 3D model files: dmp3020lss-13-etched.step / dmp3020lss-13-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); dmp3020lss-13.step / dmp3020lss-13.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Diodes Incorporated datasheet (6 pp, sha256 a0c1cde003594890, retrieved 2026-10-18, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text+vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF